From patchwork Mon Aug 13 16:11:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 176989 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 46E392C0091 for ; Tue, 14 Aug 2012 02:12:01 +1000 (EST) Received: from localhost ([::1]:56337 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T0xFH-00084Q-7V for incoming@patchwork.ozlabs.org; Mon, 13 Aug 2012 12:11:59 -0400 Received: from eggs.gnu.org ([208.118.235.92]:47856) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T0xF4-00083s-VK for qemu-devel@nongnu.org; Mon, 13 Aug 2012 12:11:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1T0xF3-0003DU-QZ for qemu-devel@nongnu.org; Mon, 13 Aug 2012 12:11:46 -0400 Received: from cantor2.suse.de ([195.135.220.15]:39260 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T0xF3-0003DI-Gi for qemu-devel@nongnu.org; Mon, 13 Aug 2012 12:11:45 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id E6B27A4FA1; Mon, 13 Aug 2012 18:11:44 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Mon, 13 Aug 2012 18:11:23 +0200 Message-Id: <1344874295-5619-3-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1344874295-5619-1-git-send-email-afaerber@suse.de> References: <1344874295-5619-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: jbaron@redhat.com, =?UTF-8?q?Andreas=20F=C3=A4rber?= , liwanp@linux.vnet.ibm.com, anthony@codemonkey.ws, mst@redhat.com Subject: [Qemu-devel] [PATCH for-1.2 v6 02/14] alpha_typhoon: QOM'ify Typhoon PCI host bridge X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce type constant and cast macro. Don't access DeviceState or PCIHostState indirectly through parent fields. Signed-off-by: Andreas Färber Acked-by: Michael S. Tsirkin --- hw/alpha_typhoon.c | 20 +++++++++++++------- 1 files changed, 13 insertions(+), 7 deletions(-) diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c index cc63737..10e588a 100644 --- a/hw/alpha_typhoon.c +++ b/hw/alpha_typhoon.c @@ -15,6 +15,8 @@ #include "exec-memory.h" +#define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" + typedef struct TyphoonCchip { MemoryRegion region; uint64_t misc; @@ -40,8 +42,12 @@ typedef struct TyphoonPchip { TyphoonWindow win[4]; } TyphoonPchip; +#define TYPHOON_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE) + typedef struct TyphoonState { PCIHostState host; + TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; @@ -700,16 +706,16 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, MemoryRegion *addr_space = get_system_memory(); MemoryRegion *addr_space_io = get_system_io(); DeviceState *dev; - PCIHostState *p; TyphoonState *s; + PCIHostState *phb; PCIBus *b; int i; - dev = qdev_create(NULL, "typhoon-pcihost"); + dev = qdev_create(NULL, TYPE_TYPHOON_PCI_HOST_BRIDGE); qdev_init_nofail(dev); - p = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); - s = container_of(p, TyphoonState, host); + s = TYPHOON_PCI_HOST_BRIDGE(dev); + phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(dev)); /* Remember the CPUs so that we can deliver interrupts to them. */ for (i = 0; i < 4; i++) { @@ -763,10 +769,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, memory_region_add_subregion(addr_space, 0x801fc000000ULL, &s->pchip.reg_io); - b = pci_register_bus(&s->host.busdev.qdev, "pci", + b = pci_register_bus(dev, "pci", typhoon_set_irq, sys_map_irq, s, &s->pchip.reg_mem, addr_space_io, 0, 64); - s->host.bus = b; + phb->bus = b; /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ memory_region_init_io(&s->pchip.reg_iack, &alpha_pci_iack_ops, b, @@ -818,7 +824,7 @@ static void typhoon_pcihost_class_init(ObjectClass *klass, void *data) } static const TypeInfo typhoon_pcihost_info = { - .name = "typhoon-pcihost", + .name = TYPE_TYPHOON_PCI_HOST_BRIDGE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(TyphoonState), .class_init = typhoon_pcihost_class_init,