| Message ID | 1344616998-9141-4-git-send-email-i.mitsyanko@samsung.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/hw/exynos4210.c b/hw/exynos4210.c index 94d2e41..3568ada 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -62,7 +62,7 @@ /* Display controllers (FIMD) */ #define EXYNOS4210_FIMD0_BASE_ADDR 0x11C00000 -static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43, +static uint8_t chipid_and_omr[TARGET_PAGE_SIZE] = { 0x11, 0x02, 0x21, 0x43, 0x09, 0x00, 0x00, 0x00 }; void exynos4210_write_secondary(ARMCPU *cpu,
chipid_mem is initialized with memory_region_init_ram_ptr() function with chipid_and_omr array as buffer argument. During initialization memory region size is aligned to page size, but size of static array chipid_and_omr is less then TARGET_PAGE_SIZE. This could result in errors in some cases, specifically, it could cause segfault during VM saving. Setting chipid_and_omr aray size to TARGET_PAGE_SIZE helps us to avoid any problems. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> --- hw/exynos4210.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)