From patchwork Fri Aug 10 12:40:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 176484 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 69EBD2C0224 for ; Fri, 10 Aug 2012 22:41:31 +1000 (EST) Comment: DKIM? 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Rozycki" To: CC: James Lemke Subject: [PATCH] Power: Reorder a sign-extend RTL pattern for readability Message-ID: User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, While examining the Power MD file seeking the explanation for a problem I saw I have noticed a change in the past separated one of the instruction splitters from its corresponding instruction pattern. Several unrelated patterns were inserted between the two, presumably by accident where the `patch' tool applied a diff made from an older or modified tree in the wrong place. I find this arrangement confusing, so I propose to move the splitter back, next to the other pattern. Here's the intended update. No functional change. OK to apply? 2012-08-10 Maciej W. Rozycki gcc/ * config/rs6000/rs6000.md: Move a splitter next to its insn. Maciej gcc-rs6000-sign-extend-reorder.diff Index: gcc-fsf-trunk-quilt/gcc/config/rs6000/rs6000.md =================================================================== --- gcc-fsf-trunk-quilt.orig/gcc/config/rs6000/rs6000.md 2012-05-13 13:50:31.000000000 +0100 +++ gcc-fsf-trunk-quilt/gcc/config/rs6000/rs6000.md 2012-08-10 03:13:05.030525435 +0100 @@ -1048,6 +1048,20 @@ #" [(set_attr "type" "compare") (set_attr "length" "4,8")]) + +(define_split + [(set (match_operand:CC 2 "cc_reg_not_micro_cr0_operand" "") + (compare:CC (sign_extend:SI (match_operand:HI 1 "gpc_reg_operand" "")) + (const_int 0))) + (set (match_operand:SI 0 "gpc_reg_operand" "") + (sign_extend:SI (match_dup 1)))] + "reload_completed" + [(set (match_dup 0) + (sign_extend:SI (match_dup 1))) + (set (match_dup 2) + (compare:CC (match_dup 0) + (const_int 0)))] + "") ;; IBM 405, 440, 464 and 476 half-word multiplication operations. @@ -1580,20 +1594,6 @@ DONE; }) -(define_split - [(set (match_operand:CC 2 "cc_reg_not_micro_cr0_operand" "") - (compare:CC (sign_extend:SI (match_operand:HI 1 "gpc_reg_operand" "")) - (const_int 0))) - (set (match_operand:SI 0 "gpc_reg_operand" "") - (sign_extend:SI (match_dup 1)))] - "reload_completed" - [(set (match_dup 0) - (sign_extend:SI (match_dup 1))) - (set (match_dup 2) - (compare:CC (match_dup 0) - (const_int 0)))] - "") - ;; Fixed-point arithmetic insns. (define_expand "add3"