From patchwork Fri Aug 10 06:42:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [PATCHv2,13/19] unicore32-softmmu: Add ps2 support Date: Thu, 09 Aug 2012 20:42:33 -0000 From: Guan Xuetao X-Patchwork-Id: 176415 Message-Id: <803b11d464a77940df42b0062489cab087ffeb62.1344580628.git.gxt@mprc.pku.edu.cn> To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, aliguori@us.ibm.com, gxt@mprc.pku.edu.cn, afaerber@suse.de, chenwj@iis.sinica.edu.tw From: Guan Xuetao This patch adds ps2/keyboard support, and enables CONFIG_PCKBD. Signed-off-by: Guan Xuetao --- default-configs/unicore32-softmmu.mak | 1 + hw/puv3.c | 5 +++++ 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/default-configs/unicore32-softmmu.mak b/default-configs/unicore32-softmmu.mak index 4d4fbfc..de38577 100644 --- a/default-configs/unicore32-softmmu.mak +++ b/default-configs/unicore32-softmmu.mak @@ -1,3 +1,4 @@ # Default configuration for unicore32-softmmu CONFIG_PUV3=y CONFIG_PTIMER=y +CONFIG_PCKBD=y diff --git a/hw/puv3.c b/hw/puv3.c index 9acfc5a..271df97 100644 --- a/hw/puv3.c +++ b/hw/puv3.c @@ -38,6 +38,7 @@ static void puv3_soc_init(CPUUniCore32State *env) { qemu_irq *cpu_intc, irqs[PUV3_IRQS_NR]; DeviceState *dev; + MemoryRegion *i8042 = g_new(MemoryRegion, 1); int i; /* Initialize interrupt controller */ @@ -57,6 +58,10 @@ static void puv3_soc_init(CPUUniCore32State *env) irqs[PUV3_IRQS_GPIOLOW4], irqs[PUV3_IRQS_GPIOLOW5], irqs[PUV3_IRQS_GPIOLOW6], irqs[PUV3_IRQS_GPIOLOW7], irqs[PUV3_IRQS_GPIOHIGH], NULL); + + /* Keyboard (i8042), mouse disabled for nographic */ + i8042_mm_init(irqs[PUV3_IRQS_PS2_KBD], NULL, i8042, PUV3_REGS_OFFSET, 4); + memory_region_add_subregion(get_system_memory(), PUV3_PS2_BASE, i8042); } static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size)