From patchwork Fri Aug 10 02:31:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 176338 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 806452C008B for ; Fri, 10 Aug 2012 12:33:44 +1000 (EST) Comment: DKIM? See http://www.dkim.org DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=gcc.gnu.org; s=default; x=1345170824; h=Comment: DomainKey-Signature:Received:Received:Received:Received:Received: Received:From:To:Cc:Subject:Date:Message-Id:In-Reply-To: References:Mailing-List:Precedence:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:Sender:Delivered-To; bh=nF1f3aP kVr7GIYCGOHA31dBzLus=; b=wn0hrsC9c7p07B24AysR3hRsK3yFC1aTtDJOINU UALN65+SPYdZ6nTiVtNXRFteFiJB8WffW9J/IjdQT88x3UIiRhyPZor8CY4OHGG0 +LF5ogxQEXH5Pj438BslBHRSJKr2+flE/a34MZ0HIH9CsDzpZ5k6IR7bpyCok+Cs TJs4= Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:Received:Received:From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:X-IsSubscribed:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=vFd2f4AnjL2d2VpguQyUjDT3nESXNM2UxQPtPHtCCi2VBcPQ+Uo/tkKf8vle0C eXQDCSqh2EX64oMI4kzJlZ5kLe3nNbHn/6V+APh+Na+ceTlIoKmMvrbmHWhx9gGe giXVF3tVeuh0i7Y11ktAiBwjxIJi0dl4Q4p+cVPLLF9Dw=; Received: (qmail 13722 invoked by alias); 10 Aug 2012 02:32:40 -0000 Received: (qmail 13315 invoked by uid 22791); 10 Aug 2012 02:32:32 -0000 X-SWARE-Spam-Status: No, hits=-4.8 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, KHOP_RCVD_TRUST, KHOP_THREADED, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, TW_BG X-Spam-Check-By: sourceware.org Received: from mail-pb0-f47.google.com (HELO mail-pb0-f47.google.com) (209.85.160.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 10 Aug 2012 02:32:11 +0000 Received: by pbcwy7 with SMTP id wy7so1833560pbc.20 for ; Thu, 09 Aug 2012 19:32:10 -0700 (PDT) Received: by 10.68.241.65 with SMTP id wg1mr8829208pbc.25.1344565930619; Thu, 09 Aug 2012 19:32:10 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id ru4sm2299014pbc.66.2012.08.09.19.32.09 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 09 Aug 2012 19:32:10 -0700 (PDT) From: Richard Henderson To: uweigand@de.ibm.com Cc: gcc-patches@gcc.gnu.org Subject: [PATCH 3/7] s390: Use risbgz for AND. Date: Thu, 9 Aug 2012 19:31:57 -0700 Message-Id: <1344565921-27852-4-git-send-email-rth@redhat.com> In-Reply-To: <1344565921-27852-1-git-send-email-rth@redhat.com> References: <1344565921-27852-1-git-send-email-rth@redhat.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org --- gcc/config/s390/s390.md | 107 +++++++++++++++++++++++++++-------------------- 1 files changed, 62 insertions(+), 45 deletions(-) diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 2677fb2..6474023 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -5946,44 +5946,50 @@ (define_insn "*anddi3_cc" [(set (reg CC_REGNUM) - (compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,d, 0") - (match_operand:DI 2 "general_operand" " d,d,RT")) - (const_int 0))) - (set (match_operand:DI 0 "register_operand" "=d,d, d") + (compare + (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,d, 0, d") + (match_operand:DI 2 "general_operand" " d,d,RT,NxxDq")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d, d, d") (and:DI (match_dup 1) (match_dup 2)))] - "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH" + "TARGET_ZARCH && s390_match_ccmode(insn, CCTmode)" "@ ngr\t%0,%2 ngrk\t%0,%1,%2 - ng\t%0,%2" - [(set_attr "op_type" "RRE,RRF,RXY") - (set_attr "cpu_facility" "*,z196,*") - (set_attr "z10prop" "z10_super_E1,*,z10_super_E1")]) + ng\t%0,%2 + risbg\t%0,%1,%s2,128+%e2,0" + [(set_attr "op_type" "RRE,RRF,RXY,RIE") + (set_attr "cpu_facility" "*,z196,*,z10") + (set_attr "z10prop" "z10_super_E1,*,z10_super_E1,z10_super_E1")]) (define_insn "*anddi3_cconly" [(set (reg CC_REGNUM) - (compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,d, 0") - (match_operand:DI 2 "general_operand" " d,d,RT")) + (compare + (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,d, 0, d") + (match_operand:DI 2 "general_operand" " d,d,RT,NxxDq")) (const_int 0))) - (clobber (match_scratch:DI 0 "=d,d, d"))] - "s390_match_ccmode(insn, CCTmode) && TARGET_ZARCH + (clobber (match_scratch:DI 0 "=d,d, d, d"))] + "TARGET_ZARCH + && s390_match_ccmode(insn, CCTmode) /* Do not steal TM patterns. */ && s390_single_part (operands[2], DImode, HImode, 0) < 0" "@ ngr\t%0,%2 ngrk\t%0,%1,%2 - ng\t%0,%2" - [(set_attr "op_type" "RRE,RRF,RXY") - (set_attr "cpu_facility" "*,z196,*") - (set_attr "z10prop" "z10_super_E1,*,z10_super_E1")]) + ng\t%0,%2 + risbg\t%0,%1,%s2,128+%e2,0" + [(set_attr "op_type" "RRE,RRF,RXY,RIE") + (set_attr "cpu_facility" "*,z196,*,z10") + (set_attr "z10prop" "z10_super_E1,*,z10_super_E1,z10_super_E1")]) (define_insn "*anddi3" [(set (match_operand:DI 0 "nonimmediate_operand" - "=d,d, d, d, d, d, d, d,d,d, d, AQ,Q") - (and:DI (match_operand:DI 1 "nonimmediate_operand" - "%d,o, 0, 0, 0, 0, 0, 0,0,d, 0, 0,0") - (match_operand:DI 2 "general_operand" - "M, M,N0HDF,N1HDF,N2HDF,N3HDF,N0SDF,N1SDF,d,d,RT,NxQDF,Q"))) + "=d,d, d, d, d, d, d, d,d,d, d, d, AQ,Q") + (and:DI + (match_operand:DI 1 "nonimmediate_operand" + "%d,o, 0, 0, 0, 0, 0, 0,0,d, 0, d, 0,0") + (match_operand:DI 2 "general_operand" + "M, M,N0HDF,N1HDF,N2HDF,N3HDF,N0SDF,N1SDF,d,d,RT,NxxDq,NxQDF,Q"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ @@ -5998,10 +6004,11 @@ ngr\t%0,%2 ngrk\t%0,%1,%2 ng\t%0,%2 + risbg\t%0,%1,%s2,128+%e2,0 # #" - [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RIL,RIL,RRE,RRF,RXY,SI,SS") - (set_attr "cpu_facility" "*,*,*,*,*,*,extimm,extimm,*,z196,*,*,*") + [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RIL,RIL,RRE,RRF,RXY,RIE,SI,SS") + (set_attr "cpu_facility" "*,*,*,*,*,*,extimm,extimm,*,z196,*,z10,*,*") (set_attr "z10prop" "*, *, z10_super_E1, @@ -6013,6 +6020,7 @@ z10_super_E1, *, z10_super_E1, + z10_super_E1, *, *")]) @@ -6033,10 +6041,12 @@ (define_insn "*andsi3_cc" [(set (reg CC_REGNUM) - (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,d,0,0") - (match_operand:SI 2 "general_operand" "Os,d,d,R,T")) - (const_int 0))) - (set (match_operand:SI 0 "register_operand" "=d,d,d,d,d") + (compare + (and:SI + (match_operand:SI 1 "nonimmediate_operand" "%0,0,d,0,0, d") + (match_operand:SI 2 "general_operand" "Os,d,d,R,T,NxxSq")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d,d,d,d, d") (and:SI (match_dup 1) (match_dup 2)))] "s390_match_ccmode(insn, CCTmode)" "@ @@ -6044,17 +6054,21 @@ nr\t%0,%2 nrk\t%0,%1,%2 n\t%0,%2 - ny\t%0,%2" - [(set_attr "op_type" "RIL,RR,RRF,RX,RXY") - (set_attr "cpu_facility" "*,*,z196,*,*") - (set_attr "z10prop" "z10_super_E1,z10_super_E1,*,z10_super_E1,z10_super_E1")]) + ny\t%0,%2 + risbg\t%0,%1,%t2,128+%f2,0" + [(set_attr "op_type" "RIL,RR,RRF,RX,RXY,RIE") + (set_attr "cpu_facility" "*,*,z196,*,*,z10") + (set_attr "z10prop" "z10_super_E1,z10_super_E1,*, + z10_super_E1,z10_super_E1,z10_super_E1")]) (define_insn "*andsi3_cconly" [(set (reg CC_REGNUM) - (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,d,0,0") - (match_operand:SI 2 "general_operand" "Os,d,d,R,T")) - (const_int 0))) - (clobber (match_scratch:SI 0 "=d,d,d,d,d"))] + (compare + (and:SI + (match_operand:SI 1 "nonimmediate_operand" "%0,0,d,0,0, d") + (match_operand:SI 2 "general_operand" "Os,d,d,R,T,NxxSq")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d,d,d,d, d"))] "s390_match_ccmode(insn, CCTmode) /* Do not steal TM patterns. */ && s390_single_part (operands[2], SImode, HImode, 0) < 0" @@ -6063,19 +6077,20 @@ nr\t%0,%2 nrk\t%0,%1,%2 n\t%0,%2 - ny\t%0,%2" - [(set_attr "op_type" "RIL,RR,RRF,RX,RXY") - (set_attr "cpu_facility" "*,*,z196,*,*") + ny\t%0,%2 + risbg\t%0,%1,%t2,128+%f2,0" + [(set_attr "op_type" "RIL,RR,RRF,RX,RXY,RIE") + (set_attr "cpu_facility" "*,*,z196,*,*,z10") (set_attr "z10prop" "z10_super_E1,z10_super_E1,*, - z10_super_E1,z10_super_E1")]) + z10_super_E1,z10_super_E1,z10_super_E1")]) (define_insn "*andsi3_zarch" [(set (match_operand:SI 0 "nonimmediate_operand" - "=d,d, d, d, d,d,d,d,d, AQ,Q") + "=d,d, d, d, d,d,d,d,d, d, AQ,Q") (and:SI (match_operand:SI 1 "nonimmediate_operand" - "%d,o, 0, 0, 0,0,d,0,0, 0,0") + "%d,o, 0, 0, 0,0,d,0,0, d, 0,0") (match_operand:SI 2 "general_operand" - " M,M,N0HSF,N1HSF,Os,d,d,R,T,NxQSF,Q"))) + " M,M,N0HSF,N1HSF,Os,d,d,R,T,NxxSq,NxQSF,Q"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ @@ -6088,10 +6103,11 @@ nrk\t%0,%1,%2 n\t%0,%2 ny\t%0,%2 + risbg\t%0,%1,%t2,128+%f2,0 # #" - [(set_attr "op_type" "RRE,RXE,RI,RI,RIL,RR,RRF,RX,RXY,SI,SS") - (set_attr "cpu_facility" "*,*,*,*,*,*,z196,*,*,*,*") + [(set_attr "op_type" "RRE,RXE,RI,RI,RIL,RR,RRF,RX,RXY,RIE,SI,SS") + (set_attr "cpu_facility" "*,*,*,*,*,*,z196,*,*,z10,*,*") (set_attr "z10prop" "*, *, z10_super_E1, @@ -6101,6 +6117,7 @@ *, z10_super_E1, z10_super_E1, + z10_super_E1, *, *")])