Patchwork [4/7] s390: Add mode attribute for mode bitsize

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Submitter Richard Henderson
Date Aug. 10, 2012, 2:31 a.m.
Message ID <1344565921-27852-5-git-send-email-rth@redhat.com>
Download mbox | patch
Permalink /patch/176333/
State New
Headers show

Comments

Richard Henderson - Aug. 10, 2012, 2:31 a.m.
Constant fold, and less typing than, GET_MODE_BITSIZE with
another mode substitution.
---
 gcc/config/s390/s390.md |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)
Andreas Krebbel - Dec. 14, 2012, 1:48 p.m.
On Thu, Aug 09, 2012 at 07:31:58PM -0700, Richard Henderson wrote:
> Constant fold, and less typing than, GET_MODE_BITSIZE with
> another mode substitution.

I did just a minor change in order to avoid a warning in the last hunk. 

Tested on s390 and s390x with different arch flags.

Please apply to mainline. Thanks!

Bye,

-Andreas-


 gcc/config/s390/s390.md |   72 ++++!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
 1 file changed, 7 insertions(+), 65 modifications(!)

Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 531,536 ****
--- 531,539 ----
  (define_mode_attr bfstart [(DI "s") (SI "t")])
  (define_mode_attr bfend   [(DI "e") (SI "f")])
  
+ ;; In place of GET_MODE_BITSIZE (<MODE>mode)
+ (define_mode_attr bitsize [(DI "64") (SI "32") (HI "16") (QI "8")])
+ 
  ;;
  ;;- Compare instructions.
  ;;
***************
*** 3326,3332 ****
  
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], size);
!   operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - bitsize);
    operands[3] = GEN_INT (mask);
  })
  
--- 3329,3335 ----
  
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], size);
!   operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
    operands[3] = GEN_INT (mask);
  })
  
***************
*** 3353,3359 ****
  
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], size);
!   operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - bitsize);
    operands[3] = GEN_INT (mask);
  })
  
--- 3356,3362 ----
  
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], size);
!   operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
    operands[3] = GEN_INT (mask);
  })
  
***************
*** 3373,3421 ****
    FAIL;
  })
  
  (define_insn "*insv<mode>_zEC12"
    [(set (zero_extract:GPR (match_operand:GPR 0 "nonimmediate_operand" "+d")
! 			  (match_operand 1 "const_int_operand"    "I")
! 			  (match_operand 2 "const_int_operand"    "I"))
  	(match_operand:GPR 3 "nonimmediate_operand" "d"))]
    "TARGET_ZEC12
!    && (INTVAL (operands[1]) + INTVAL (operands[2])) <=
!       GET_MODE_BITSIZE (<MODE>mode)"
! {
!   int start = INTVAL (operands[2]);
!   int size = INTVAL (operands[1]);
!   int offset = 64 - GET_MODE_BITSIZE (<MODE>mode);
! 
!   operands[2] = GEN_INT (offset + start);              /* start bit position */
!   operands[1] = GEN_INT (offset + start + size - 1);   /* end bit position */
!   operands[4] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) -
! 			 start - size);       /* left shift count */
! 
!   return "risbgn\t%0,%3,%b2,%b1,%b4";
! }
    [(set_attr "op_type" "RIE")])
  
  (define_insn "*insv<mode>_z10"
    [(set (zero_extract:GPR (match_operand:GPR 0 "nonimmediate_operand" "+d")
! 			  (match_operand 1 "const_int_operand"    "I")
! 			  (match_operand 2 "const_int_operand"    "I"))
  	(match_operand:GPR 3 "nonimmediate_operand" "d"))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_Z10
!    && (INTVAL (operands[1]) + INTVAL (operands[2])) <=
!       GET_MODE_BITSIZE (<MODE>mode)"
! {
!   int start = INTVAL (operands[2]);
!   int size = INTVAL (operands[1]);
!   int offset = 64 - GET_MODE_BITSIZE (<MODE>mode);
! 
!   operands[2] = GEN_INT (offset + start);              /* start bit position */
!   operands[1] = GEN_INT (offset + start + size - 1);   /* end bit position */
!   operands[4] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) -
! 			 start - size);       /* left shift count */
! 
!   return "risbg\t%0,%3,%b2,%b1,%b4";
! }
    [(set_attr "op_type" "RIE")
     (set_attr "z10prop" "z10_super_E1")])
  
--- 3376,3404 ----
    FAIL;
  })
  
+ 
+ ; The normal RTL expansion will never generate a zero_extract where
+ ; the location operand isn't word mode.  However, we do this in the
+ ; back-end when generating atomic operations. See s390_two_part_insv.
  (define_insn "*insv<mode>_zEC12"
    [(set (zero_extract:GPR (match_operand:GPR 0 "nonimmediate_operand" "+d")
! 			  (match_operand 1 "const_int_operand"    "I")  ; size
! 			  (match_operand 2 "const_int_operand"    "I")) ; pos
  	(match_operand:GPR 3 "nonimmediate_operand" "d"))]
    "TARGET_ZEC12
!    && (INTVAL (operands[1]) + INTVAL (operands[2])) <= <bitsize>"
!   "risbgn\t%0,%3,64-<bitsize>+%2,64-<bitsize>+%2+%1-1,<bitsize>-%2-%1"
    [(set_attr "op_type" "RIE")])
  
  (define_insn "*insv<mode>_z10"
    [(set (zero_extract:GPR (match_operand:GPR 0 "nonimmediate_operand" "+d")
! 			  (match_operand 1 "const_int_operand"    "I")  ; size
! 			  (match_operand 2 "const_int_operand"    "I")) ; pos
  	(match_operand:GPR 3 "nonimmediate_operand" "d"))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_Z10
!    && (INTVAL (operands[1]) + INTVAL (operands[2])) <= <bitsize>"
!   "risbg\t%0,%3,64-<bitsize>+%2,64-<bitsize>+%2+%1-1,<bitsize>-%2-%1"
    [(set_attr "op_type" "RIE")
     (set_attr "z10prop" "z10_super_E1")])
  
***************
*** 3585,3592 ****
      }
    else if (!TARGET_EXTIMM)
      {
!       rtx bitcount = GEN_INT (GET_MODE_BITSIZE (<DSI:MODE>mode) -
! 			      GET_MODE_BITSIZE (<HQI:MODE>mode));
  
        operands[1] = gen_lowpart (<DSI:MODE>mode, operands[1]);
        emit_insn (gen_ashl<DSI:mode>3 (operands[0], operands[1], bitcount));
--- 3568,3574 ----
      }
    else if (!TARGET_EXTIMM)
      {
!       rtx bitcount = GEN_INT (<DSI:bitsize> - <HQI:bitsize>);
  
        operands[1] = gen_lowpart (<DSI:MODE>mode, operands[1]);
        emit_insn (gen_ashl<DSI:mode>3 (operands[0], operands[1], bitcount));
***************
*** 3688,3695 ****
  {
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], GET_MODE_SIZE (QImode));
!   operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode)
! 			 - GET_MODE_BITSIZE (QImode));
  })
  
  ;
--- 3670,3676 ----
  {
    operands[1] = adjust_address (operands[1], BLKmode, 0);
    set_mem_size (operands[1], GET_MODE_SIZE (QImode));
!   operands[2] = GEN_INT (<GPR:bitsize> - BITS_PER_UNIT);
  })
  
  ;
***************
*** 3800,3807 ****
      }
    else if (!TARGET_EXTIMM)
      {
!       rtx bitcount = GEN_INT (GET_MODE_BITSIZE(DImode) -
! 			      GET_MODE_BITSIZE(<MODE>mode));
        operands[1] = gen_lowpart (DImode, operands[1]);
        emit_insn (gen_ashldi3 (operands[0], operands[1], bitcount));
        emit_insn (gen_lshrdi3 (operands[0], operands[0], bitcount));
--- 3781,3787 ----
      }
    else if (!TARGET_EXTIMM)
      {
!       rtx bitcount = GEN_INT (64 - <HQI:bitsize>);
        operands[1] = gen_lowpart (DImode, operands[1]);
        emit_insn (gen_ashldi3 (operands[0], operands[1], bitcount));
        emit_insn (gen_lshrdi3 (operands[0], operands[0], bitcount));
***************
*** 3818,3824 ****
      {
        operands[1] = gen_lowpart (SImode, operands[1]);
        emit_insn (gen_andsi3 (operands[0], operands[1],
!                    GEN_INT ((1 << GET_MODE_BITSIZE(<MODE>mode)) - 1)));
        DONE;
      }
  })
--- 3798,3804 ----
      {
        operands[1] = gen_lowpart (SImode, operands[1]);
        emit_insn (gen_andsi3 (operands[0], operands[1],
! 			     GEN_INT ((1 << <HQI:bitsize>) - 1)));
        DONE;
      }
  })
***************
*** 4011,4018 ****
        REAL_VALUE_TYPE cmp, sub;
  
        operands[1] = force_reg (<BFP:MODE>mode, operands[1]);
!       real_2expN (&cmp, GET_MODE_BITSIZE(<GPR:MODE>mode) - 1, <BFP:MODE>mode);
!       real_2expN (&sub, GET_MODE_BITSIZE(<GPR:MODE>mode), <BFP:MODE>mode);
  
        emit_cmp_and_jump_insns (operands[1],
  	    CONST_DOUBLE_FROM_REAL_VALUE (cmp, <BFP:MODE>mode),
--- 3991,3998 ----
        REAL_VALUE_TYPE cmp, sub;
  
        operands[1] = force_reg (<BFP:MODE>mode, operands[1]);
!       real_2expN (&cmp, <GPR:bitsize> - 1, <BFP:MODE>mode);
!       real_2expN (&sub, <GPR:bitsize>, <BFP:MODE>mode);
  
        emit_cmp_and_jump_insns (operands[1],
  	    CONST_DOUBLE_FROM_REAL_VALUE (cmp, <BFP:MODE>mode),
***************
*** 4727,4735 ****
          (plus:GPR (match_dup 1) (match_dup 2)))]
    "s390_match_ccmode (insn, CCAmode)
     && (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'K', \"K\")
!        || CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'O', \"Os\")
!        || CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'C', \"C\"))
!    && INTVAL (operands[2]) != -((HOST_WIDE_INT)1 << (GET_MODE_BITSIZE(<MODE>mode) - 1))"
    "@
     a<g>hi\t%0,%h2
     a<g>hik\t%0,%1,%h2
--- 4707,4715 ----
          (plus:GPR (match_dup 1) (match_dup 2)))]
    "s390_match_ccmode (insn, CCAmode)
     && (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'K', \"K\")
!        || (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'O', \"Os\")
!            /* Avoid INT32_MIN on 32 bit.  */
!            && (!TARGET_ZARCH || INTVAL (operands[2]) != -0x7fffffff - 1)))"
    "@
     a<g>hi\t%0,%h2
     a<g>hik\t%0,%1,%h2

Patch

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 6474023..b6e1535 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -522,6 +522,9 @@ 
 (define_mode_attr bfstart [(DI "s") (SI "t")])
 (define_mode_attr bfend   [(DI "e") (SI "f")])
 
+;; In place of GET_MODE_BITSIZE (<MODE>mode)
+(define_mode_attr bitsize [(DI "64") (SI "32") (HI "16") (QI "8")])
+
 ;;
 ;;- Compare instructions.
 ;;
@@ -3317,7 +3320,7 @@ 
 
   operands[1] = adjust_address (operands[1], BLKmode, 0);
   set_mem_size (operands[1], size);
-  operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - bitsize);
+  operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
   operands[3] = GEN_INT (mask);
 })
 
@@ -3344,7 +3347,7 @@ 
 
   operands[1] = adjust_address (operands[1], BLKmode, 0);
   set_mem_size (operands[1], size);
-  operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - bitsize);
+  operands[2] = GEN_INT (<GPR:bitsize> - bitsize);
   operands[3] = GEN_INT (mask);
 })
 
@@ -3532,8 +3535,7 @@ 
     }
   else if (!TARGET_EXTIMM)
     {
-      rtx bitcount = GEN_INT (GET_MODE_BITSIZE (<DSI:MODE>mode) -
-			      GET_MODE_BITSIZE (<HQI:MODE>mode));
+      rtx bitcount = GEN_INT (<DSI:bitsize> - <HQI:bitsize>);
 
       operands[1] = gen_lowpart (<DSI:MODE>mode, operands[1]);
       emit_insn (gen_ashl<DSI:mode>3 (operands[0], operands[1], bitcount));
@@ -3635,8 +3637,7 @@ 
 {
   operands[1] = adjust_address (operands[1], BLKmode, 0);
   set_mem_size (operands[1], GET_MODE_SIZE (QImode));
-  operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode)
-			 - GET_MODE_BITSIZE (QImode));
+  operands[2] = GEN_INT (<GPR:bitsize> - BITS_PER_UNIT);
 })
 
 ;
@@ -3747,8 +3748,7 @@ 
     }
   else if (!TARGET_EXTIMM)
     {
-      rtx bitcount = GEN_INT (GET_MODE_BITSIZE(DImode) -
-			      GET_MODE_BITSIZE(<MODE>mode));
+      rtx bitcount = GEN_INT (64 - <HQI:bitsize>);
       operands[1] = gen_lowpart (DImode, operands[1]);
       emit_insn (gen_ashldi3 (operands[0], operands[1], bitcount));
       emit_insn (gen_lshrdi3 (operands[0], operands[0], bitcount));
@@ -3765,7 +3765,7 @@ 
     {
       operands[1] = gen_lowpart (SImode, operands[1]);
       emit_insn (gen_andsi3 (operands[0], operands[1],
-                   GEN_INT ((1 << GET_MODE_BITSIZE(<MODE>mode)) - 1)));
+			     GEN_INT ((1 << <HQI:bitsize>) - 1)));
       DONE;
     }
 })
@@ -3958,8 +3958,8 @@ 
       REAL_VALUE_TYPE cmp, sub;
 
       operands[1] = force_reg (<BFP:MODE>mode, operands[1]);
-      real_2expN (&cmp, GET_MODE_BITSIZE(<GPR:MODE>mode) - 1, <BFP:MODE>mode);
-      real_2expN (&sub, GET_MODE_BITSIZE(<GPR:MODE>mode), <BFP:MODE>mode);
+      real_2expN (&cmp, <GPR:bitsize> - 1, <BFP:MODE>mode);
+      real_2expN (&sub, <GPR:bitsize>, <BFP:MODE>mode);
 
       emit_cmp_and_jump_insns (operands[1],
 	    CONST_DOUBLE_FROM_REAL_VALUE (cmp, <BFP:MODE>mode),
@@ -4676,7 +4676,7 @@ 
    && (CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'K', \"K\")
        || CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'O', \"Os\")
        || CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'C', \"C\"))
-   && INTVAL (operands[2]) != -((HOST_WIDE_INT)1 << (GET_MODE_BITSIZE(<MODE>mode) - 1))"
+   && INTVAL (operands[2]) != -((HOST_WIDE_INT)1 << (<bitsize> - 1))"
   "@
    a<g>hi\t%0,%h2
    a<g>hik\t%0,%1,%h2