From patchwork Thu Aug 9 13:33:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yann Vernier X-Patchwork-Id: 176090 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 018432C008B for ; Thu, 9 Aug 2012 23:34:18 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ECF2C28118; Thu, 9 Aug 2012 15:33:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9+KUOhZovIhH; Thu, 9 Aug 2012 15:33:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5DD4D28110; Thu, 9 Aug 2012 15:33:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7A70D280EB for ; Thu, 9 Aug 2012 15:33:30 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bAfVWWzErr7N for ; Thu, 9 Aug 2012 15:33:30 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f172.google.com (mail-lb0-f172.google.com [209.85.217.172]) by theia.denx.de (Postfix) with ESMTPS id 145F0280ED for ; Thu, 9 Aug 2012 15:33:24 +0200 (CEST) Received: by mail-lb0-f172.google.com with SMTP id gg6so269924lbb.3 for ; Thu, 09 Aug 2012 06:33:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:subject:message-id:in-reply-to:references:organization :x-mailer:mime-version:content-type:content-transfer-encoding :x-gm-message-state; bh=NIiDiniDCQGoZ4O1D+EwLM8nd8uJ3f7Wqux0fmv3e0k=; b=FLvods+sSq7gC1uJWey3ZaP3aim8h8nZtOxHaZL5G5NHCguCdbA/ldj7ytKacnlH6D xst3BVBeolLdyhji753KQaymQsmLJXuKaJY66b9hYvMnqNCnn9msq8ASCiXdOd41aLwK +e8TPThBJOpojaU16+jsMdyhmbWvL2kBO8KtivWI8RZVMxBkX+TtYfC0WJ39l6I203SM e74VN2riDQnYWgGtr4yQQo5+Ofqn7qk/Vg5gXYgDWmYAX3hIssxLR1BNjsPBRZWR1f4H ZUwh5i3JKUsOoWJO0DDs47ILsS1xdzrZxYKcbmkvyEG0Qjn10zJi2s5WRaqfSoTwKN5y du8Q== Received: by 10.152.131.42 with SMTP id oj10mr4068365lab.49.1344519204178; Thu, 09 Aug 2012 06:33:24 -0700 (PDT) Received: from latmask.vernier.se (c213-89-175-97.bredband.comhem.se. [213.89.175.97]) by mx.google.com with ESMTPS id j1sm346281lby.8.2012.08.09.06.33.23 (version=SSLv3 cipher=OTHER); Thu, 09 Aug 2012 06:33:23 -0700 (PDT) Date: Thu, 9 Aug 2012 15:33:08 +0200 From: Yann Vernier To: u-boot@lists.denx.de Message-ID: <20120809153308.31dd7dee@latmask.vernier.se> In-Reply-To: <20120706133342.47ace724@aari01-12> References: <20120706133342.47ace724@aari01-12> Organization: ORSoC AB X-Mailer: Claws Mail 3.8.1 (GTK+ 2.24.10; x86_64-pc-linux-gnu) Mime-Version: 1.0 X-Gm-Message-State: ALoCoQnHJodgWI3ull+ThzLeANLtZGZj9bvteCbzzUWH7+djSdAlCT8cG0X3dfdSjmh60KDodOIa Subject: [U-Boot] [PATCH 05/11] arm: cm4008, cm41xx: set gd->ram_size in dram_init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Leave dram_init_banksize to set up the bank info data. ram_size was previously uninitialized. Also put data on SDRAM configuration in header file. Signed-off-by: Yann Vernier --- Changes for v2: - Update to use CONFIG_SYS_SDRAM_ constants - Update cm41xx also - Map SDRAM to match configuration Changes for v3: - Moved SDRAM configuration to header file, in preparation for lowlevel constant cleanup. --- board/cm4008/cm4008.c | 5 +++-- board/cm41xx/cm41xx.c | 5 +++-- include/configs/cm4008.h | 11 ++++++++--- include/configs/cm41xx.h | 9 ++++++--- 4 files changed, 20 insertions(+), 10 deletions(-) RAM */ diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c index ed493a8..6c0da9a 100644 --- a/board/cm4008/cm4008.c +++ b/board/cm4008/cm4008.c @@ -97,8 +97,9 @@ int board_init (void) int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return (0); } diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c index d9dff4e..6aef617 100644 --- a/board/cm41xx/cm41xx.c +++ b/board/cm41xx/cm41xx.c @@ -97,8 +97,9 @@ int board_init (void) int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return (0); } diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index fe62f73..18f7900 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -106,13 +106,18 @@ #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ #endif + /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* SDRAM Bank #1 */ +#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MB */ +#define CONFIG_SYS_SDCS0_PARAMS (KS8695_SDCON_CA_8BIT | \ + KS8695_SDCON_4BANK | KS8695_SDCON_D_32) +#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 +#define CONFIG_SYS_SDRAM_MODE 0x033 + #define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 485792c..ed345b0 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -110,9 +110,12 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* SDRAM Bank #1 */ +#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32 MB */ +#define CONFIG_SYS_SDCS0_PARAMS (KS8695_SDCON_CA_8BIT | \ + KS8695_SDCON_4BANK | KS8695_SDCON_D_32) +#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 +#define CONFIG_SYS_SDRAM_MODE 0x033 #define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of