From patchwork Wed Aug 8 06:25:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pingfan liu X-Patchwork-Id: 175875 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0213A2C0090 for ; Wed, 8 Aug 2012 17:19:32 +1000 (EST) Received: from localhost ([::1]:35861 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyzjY-0001Zv-Nl for incoming@patchwork.ozlabs.org; Wed, 08 Aug 2012 02:27:08 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyzjR-0001R0-7K for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:27:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SyzjP-0002RJ-VW for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:27:01 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:47873) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyzjP-0001rm-P3 for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:26:59 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so493650pbb.4 for ; Tue, 07 Aug 2012 23:26:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=1XpPnsnUKT59a8488dVyQqnnCvNmgLLisvugOfX8vqE=; b=xcO3XHXEAd0vg/8XoqHyrd+l13xqsPZhypvBl6N3xnqi+3T8L9sB71pqjv4xbDnSk8 Sal0bJNsFd+uMMQrTX1q9ksvMyA6Vz8XLcvDc68+k2qF5vVmkIFtpZhG9JzsVXjlkNRi laaBFoOpdM8HU19svPnooqC9DKBlParGy9qAw18bCXBZf9TkLHVVl69x3eYC6QEjWHl7 jlIZswdoM2/kId1wG2ePWw+E5sC4iQ0Gyhs9H6nlPkhteQjGkWbWuNie61MJxIhR4AE5 DpOcA5FsfKfKpSsxV37bvJx0JkAf7yHYwYEtDhQR1Kss5hmiesVgxmh/RnWrOEvZLTnC 4wwg== Received: by 10.68.213.234 with SMTP id nv10mr33517044pbc.56.1344407219444; Tue, 07 Aug 2012 23:26:59 -0700 (PDT) Received: from localhost ([202.108.130.138]) by mx.google.com with ESMTPS id og7sm12366807pbb.62.2012.08.07.23.26.57 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 23:26:58 -0700 (PDT) From: Liu Ping Fan To: qemu-devel@nongnu.org Date: Wed, 8 Aug 2012 14:25:51 +0800 Message-Id: <1344407156-25562-11-git-send-email-qemulist@gmail.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1344407156-25562-1-git-send-email-qemulist@gmail.com> References: <1344407156-25562-1-git-send-email-qemulist@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: kvm@vger.kernel.org, Stefan Hajnoczi , Marcelo Tosatti , qemulist@gmail.com, Blue Swirl , Avi Kivity , Anthony Liguori , Jan Kiszka , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 10/15] memory: change tcg related code to using PhysMap X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Liu Ping Fan Change tcg code to use PhysMap. This is separated from the prev patch for review purpose. Should be merged into prev one. Signed-off-by: Liu Ping Fan --- exec.c | 27 +++++++++++++++++++++------ 1 files changed, 21 insertions(+), 6 deletions(-) diff --git a/exec.c b/exec.c index 97addb9..8d0dea5 100644 --- a/exec.c +++ b/exec.c @@ -1923,6 +1923,7 @@ target_phys_addr_t memory_region_section_get_iotlb(CPUArchState *env, { target_phys_addr_t iotlb; CPUWatchpoint *wp; + PhysMap *map = cur_map_get(); if (memory_region_is_ram(section->mr)) { /* Normal RAM. */ @@ -1940,7 +1941,7 @@ target_phys_addr_t memory_region_section_get_iotlb(CPUArchState *env, and avoid full address decoding in every device. We can't use the high bits of pd for this because IO_MEM_ROMD uses these as a ram address. */ - iotlb = section - phys_sections; + iotlb = section - map->phys_sections; iotlb += memory_region_section_addr(section, paddr); } @@ -1956,6 +1957,7 @@ target_phys_addr_t memory_region_section_get_iotlb(CPUArchState *env, } } } + physmap_put(map); return iotlb; } @@ -3185,7 +3187,12 @@ static uint16_t dummy_section(PhysMap *map, MemoryRegion *mr) MemoryRegion *iotlb_to_region(target_phys_addr_t index) { - return phys_sections[index & ~TARGET_PAGE_MASK].mr; + MemoryRegion *ret; + PhysMap *map = cur_map_get(); + + ret = map->phys_sections[index & ~TARGET_PAGE_MASK].mr; + physmap_put(map); + return ret; } static void io_mem_init(void) @@ -3946,13 +3953,14 @@ void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val) { uint8_t *ptr; MemoryRegionSection *section; + PhysMap *map = cur_map_get(); section = phys_page_find(addr >> TARGET_PAGE_BITS); if (!memory_region_is_ram(section->mr) || section->readonly) { addr = memory_region_section_addr(section, addr); if (memory_region_is_ram(section->mr)) { - section = &phys_sections[phys_section_rom]; + section = &map->phys_sections[phys_section_rom]; } io_mem_write(section->mr, addr, val, 4); } else { @@ -3972,19 +3980,21 @@ void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val) } } } + physmap_put(map); } void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val) { uint8_t *ptr; MemoryRegionSection *section; + PhysMap *map = cur_map_get(); section = phys_page_find(addr >> TARGET_PAGE_BITS); if (!memory_region_is_ram(section->mr) || section->readonly) { addr = memory_region_section_addr(section, addr); if (memory_region_is_ram(section->mr)) { - section = &phys_sections[phys_section_rom]; + section = &map->phys_sections[phys_section_rom]; } #ifdef TARGET_WORDS_BIGENDIAN io_mem_write(section->mr, addr, val >> 32, 4); @@ -3999,6 +4009,7 @@ void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val) + memory_region_section_addr(section, addr)); stq_p(ptr, val); } + physmap_put(map); } /* warning: addr must be aligned */ @@ -4008,12 +4019,13 @@ static inline void stl_phys_internal(target_phys_addr_t addr, uint32_t val, uint8_t *ptr; MemoryRegionSection *section; + PhysMap *map = cur_map_get(); section = phys_page_find(addr >> TARGET_PAGE_BITS); if (!memory_region_is_ram(section->mr) || section->readonly) { addr = memory_region_section_addr(section, addr); if (memory_region_is_ram(section->mr)) { - section = &phys_sections[phys_section_rom]; + section = &map->phys_sections[phys_section_rom]; } #if defined(TARGET_WORDS_BIGENDIAN) if (endian == DEVICE_LITTLE_ENDIAN) { @@ -4050,6 +4062,7 @@ static inline void stl_phys_internal(target_phys_addr_t addr, uint32_t val, (0xff & ~CODE_DIRTY_FLAG)); } } + physmap_put(map); } void stl_phys(target_phys_addr_t addr, uint32_t val) @@ -4081,12 +4094,13 @@ static inline void stw_phys_internal(target_phys_addr_t addr, uint32_t val, uint8_t *ptr; MemoryRegionSection *section; + PhysMap *map = cur_map_get(); section = phys_page_find(addr >> TARGET_PAGE_BITS); if (!memory_region_is_ram(section->mr) || section->readonly) { addr = memory_region_section_addr(section, addr); if (memory_region_is_ram(section->mr)) { - section = &phys_sections[phys_section_rom]; + section = &map->phys_sections[phys_section_rom]; } #if defined(TARGET_WORDS_BIGENDIAN) if (endian == DEVICE_LITTLE_ENDIAN) { @@ -4123,6 +4137,7 @@ static inline void stw_phys_internal(target_phys_addr_t addr, uint32_t val, (0xff & ~CODE_DIRTY_FLAG)); } } + physmap_put(map); } void stw_phys(target_phys_addr_t addr, uint32_t val)