diff mbox

[U-Boot,13/16] Blackfin: Bf60x: add hw watchdog support

Message ID 1344326875-348-13-git-send-email-lliubbo@gmail.com
State Superseded
Delegated to: Mike Frysinger
Headers show

Commit Message

Bob Liu Aug. 7, 2012, 8:07 a.m. UTC
Signed-off-by: Bob Liu <lliubbo@gmail.com>
---
 arch/blackfin/cpu/initcode.c  |   14 ++++++++++++++
 arch/blackfin/cpu/start.S     |    2 ++
 include/configs/bf609-ezkit.h |    1 +
 3 files changed, 17 insertions(+)

Comments

Mike Frysinger Aug. 8, 2012, 5:11 a.m. UTC | #1
On Tuesday 07 August 2012 04:07:52 Bob Liu wrote:
> --- a/arch/blackfin/cpu/initcode.c
> +++ b/arch/blackfin/cpu/initcode.c
>
>  	if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
>  		serial_putc('e');
> +#ifdef __ADSPBF60x__
> +		int i;
> +		bfin_write_SEC_GCTL(0x2);
> +		while (i++ < 100000);
> +		bfin_write_SEC_FCTL(0xc1);
> +		bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
> +
> +		bfin_write_SEC_CCTL(0x2);
> +		while (i++ < 100000);
> +		bfin_write_SEC_GCTL(0x1);
> +		bfin_write_SEC_CCTL(0x1);
> +#endif

err, this doesn't look like hardware watchdog ... this is the interrupt 
controller isn't it ?

those while() loops also won't fly -- you need to use a proper sync function 
here.  certainly not without comments as to what's going on.

> --- a/arch/blackfin/cpu/start.S
> +++ b/arch/blackfin/cpu/start.S
> @@ -65,6 +65,7 @@ ENTRY(_start)
>  	p5.h = HI(COREMMR_BASE);
> 
>  #ifdef CONFIG_HW_WATCHDOG
> +#ifndef __ADSPBF60x__
>  # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
>  #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
>  # endif
> @@ -78,6 +79,7 @@ ENTRY(_start)
>  	/* fire up the watchdog - R0.L above needs to be 0x0000 */
>  	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
>  #endif
> +#endif

you need to implement the bf60x equivalent here and not just disable the bf5xx 
code
-mike
Bob Liu Aug. 20, 2012, 8:25 a.m. UTC | #2
On Wed, Aug 8, 2012 at 1:11 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Tuesday 07 August 2012 04:07:52 Bob Liu wrote:
>> --- a/arch/blackfin/cpu/initcode.c
>> +++ b/arch/blackfin/cpu/initcode.c
>>
>>       if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
>>               serial_putc('e');
>> +#ifdef __ADSPBF60x__
>> +             int i;
>> +             bfin_write_SEC_GCTL(0x2);
>> +             while (i++ < 100000);
>> +             bfin_write_SEC_FCTL(0xc1);
>> +             bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
>> +
>> +             bfin_write_SEC_CCTL(0x2);
>> +             while (i++ < 100000);
>> +             bfin_write_SEC_GCTL(0x1);
>> +             bfin_write_SEC_CCTL(0x1);
>> +#endif
>
> err, this doesn't look like hardware watchdog ... this is the interrupt
> controller isn't it ?

The interrupt controller in bf60x has integrated a fault controller.
The watchdog can trigger a reset fault then the system can do automatic reset.

>
> those while() loops also won't fly -- you need to use a proper sync function
> here.  certainly not without comments as to what's going on.

Will be updated.

>
>> --- a/arch/blackfin/cpu/start.S
>> +++ b/arch/blackfin/cpu/start.S
>> @@ -65,6 +65,7 @@ ENTRY(_start)
>>       p5.h = HI(COREMMR_BASE);
>>
>>  #ifdef CONFIG_HW_WATCHDOG
>> +#ifndef __ADSPBF60x__
>>  # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
>>  #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
>>  # endif
>> @@ -78,6 +79,7 @@ ENTRY(_start)
>>       /* fire up the watchdog - R0.L above needs to be 0x0000 */
>>       W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
>>  #endif
>> +#endif
>
> you need to implement the bf60x equivalent here and not just disable the bf5xx
> code

This code is setup a watchdog for bootstrap itself before entering
uboot common routine.
It's not that important and a little complicate to setup the interrupt
controller using  assemble.
So i'd prefer to disable it for bf60x first.
diff mbox

Patch

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 3197c40..c68302f 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -458,8 +458,22 @@  program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB)
 	 */
 	if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
 		serial_putc('e');
+#ifdef __ADSPBF60x__
+		int i;
+		bfin_write_SEC_GCTL(0x2);
+		while (i++ < 100000);
+		bfin_write_SEC_FCTL(0xc1);
+		bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
+
+		bfin_write_SEC_CCTL(0x2);
+		while (i++ < 100000);
+		bfin_write_SEC_GCTL(0x1);
+		bfin_write_SEC_CCTL(0x1);
+#endif
 		bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
 		bfin_write_WDOG_CTL(0);
+#endif
 		serial_putc('f');
 	}
 #endif
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 90b4d1a..7155fc8 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -65,6 +65,7 @@  ENTRY(_start)
 	p5.h = HI(COREMMR_BASE);
 
 #ifdef CONFIG_HW_WATCHDOG
+#ifndef __ADSPBF60x__
 # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
 #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
 # endif
@@ -78,6 +79,7 @@  ENTRY(_start)
 	/* fire up the watchdog - R0.L above needs to be 0x0000 */
 	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
 #endif
+#endif
 
 	/* Turn on the serial for debugging the init process */
 	serial_early_init
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 311b2e4..64b1eb6 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -78,6 +78,7 @@ 
 #define CONFIG_SYS_MONITOR_LEN	(512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
 
+#define CONFIG_HW_WATCHDOG
 /*
  * Network Settings
  */