From patchwork Mon Aug 6 18:49:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 175431 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id AEBDD2C00A2 for ; Tue, 7 Aug 2012 04:50:03 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C063A28188; Mon, 6 Aug 2012 20:50:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SlNCq00wzl0v; Mon, 6 Aug 2012 20:50:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3CF8528189; Mon, 6 Aug 2012 20:50:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C78DA28189 for ; Mon, 6 Aug 2012 20:49:58 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8t2bmNF+Ku8a for ; Mon, 6 Aug 2012 20:49:58 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ob0-f172.google.com (mail-ob0-f172.google.com [209.85.214.172]) by theia.denx.de (Postfix) with ESMTPS id 1CF2E28188 for ; Mon, 6 Aug 2012 20:49:56 +0200 (CEST) Received: by obbwc20 with SMTP id wc20so6080538obb.3 for ; Mon, 06 Aug 2012 11:49:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; bh=NwE7n3jpTfWs76uvN7UikVQiuDNW2GLweydclGoP4Ow=; b=z8eiVLEMWAgK50bgYGSYx+ATHFJbUt7rBLVk/ExJh+3PbSTieAUtB26rQL0H0zX8R0 4ioWnmTInwmXNCRlcOQyu8KySCdqc2lJGNmzb7fOUMUD73SWwJOgC+GKz/J68ZkCMSfe sz1TfwG/fJN2EulOcHEAdiZRhOSS3WrcYyt2Dyx2jGqrbuM0XXMofFSovkldMTxNebnE iImXed/7dMY8dovoZjGcMjqUHcNn0nvdpSI+758BDOMgnePk/Vx2jeg283+IeOFrW5vc RY0l96DtFwFsGwVUiUH4kKbuet1nDUF4Z+8nSUK9+4FYZyfBUELfDNLvzl1PYZbYyr1D 9IJg== Received: by 10.182.74.66 with SMTP id r2mr20525828obv.29.1344278995724; Mon, 06 Aug 2012 11:49:55 -0700 (PDT) Received: from localhost.localdomain (ip68-230-54-74.ph.ph.cox.net. [68.230.54.74]) by mx.google.com with ESMTPS id qd7sm17972843obc.5.2012.08.06.11.49.54 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 06 Aug 2012 11:49:55 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Mon, 6 Aug 2012 11:49:54 -0700 Message-Id: <1344278994-30848-1-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1344201713-10291-4-git-send-email-ilya.yanok@cogentembedded.com> References: <1344201713-10291-4-git-send-email-ilya.yanok@cogentembedded.com> Subject: [U-Boot] [PATCH] am33xx: Remove redundant timer config X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that has been configuring and enabling the timer, so remove our code that does the same thing by different methods. Tested on EVM GP, SK-EVM and Beaglebone. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2ca4ca7..5b00719 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -37,7 +37,6 @@ DECLARE_GLOBAL_DATA_PTR; struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; -struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; static const struct gpio_bank gpio_bank_am33xx[4] = { @@ -119,22 +118,6 @@ static int read_eeprom(void) #define UART_SMART_IDLE_EN (0x1 << 0x3) #endif -#ifdef CONFIG_SPL_BUILD -/* Initialize timer */ -static void init_timer(void) -{ - /* Reset the Timer */ - writel(0x2, (&timer_base->tscir)); - - /* Wait until the reset is done */ - while (readl(&timer_base->tiocp_cfg) & 1) - ; - - /* Start the Timer */ - writel(0x1, (&timer_base->tclr)); -} -#endif - /* * Determine what type of DDR we have. */ @@ -183,9 +166,6 @@ void s_init(void) regVal |= UART_SMART_IDLE_EN; writel(regVal, &uart_base->uartsyscfg); - /* Initialize the Timer */ - init_timer(); - preloader_console_init(); /* Initalize the board header */