Patchwork [U-Boot] am33xx: Remove redundant timer config

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Submitter Tom Rini
Date Aug. 6, 2012, 6:49 p.m.
Message ID <1344278994-30848-1-git-send-email-trini@ti.com>
Download mbox | patch
Permalink /patch/175431/
State Accepted
Commit 14dace70580df099deb9cdce8f9cfb16a31e9d1b
Delegated to: Tom Rini
Headers show

Comments

Tom Rini - Aug. 6, 2012, 6:49 p.m.
We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that
has been configuring and enabling the timer, so remove our code that
does the same thing by different methods.

Tested on EVM GP, SK-EVM and Beaglebone.

Signed-off-by: Tom Rini <trini@ti.com>
---
 arch/arm/cpu/armv7/am33xx/board.c |   20 --------------------
 1 file changed, 20 deletions(-)

Patch

diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 2ca4ca7..5b00719 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -37,7 +37,6 @@ 
 DECLARE_GLOBAL_DATA_PTR;
 
 struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
 struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 
 static const struct gpio_bank gpio_bank_am33xx[4] = {
@@ -119,22 +118,6 @@  static int read_eeprom(void)
 #define UART_SMART_IDLE_EN	(0x1 << 0x3)
 #endif
 
-#ifdef CONFIG_SPL_BUILD
-/* Initialize timer */
-static void init_timer(void)
-{
-	/* Reset the Timer */
-	writel(0x2, (&timer_base->tscir));
-
-	/* Wait until the reset is done */
-	while (readl(&timer_base->tiocp_cfg) & 1)
-		;
-
-	/* Start the Timer */
-	writel(0x1, (&timer_base->tclr));
-}
-#endif
-
 /*
  * Determine what type of DDR we have.
  */
@@ -183,9 +166,6 @@  void s_init(void)
 	regVal |= UART_SMART_IDLE_EN;
 	writel(regVal, &uart_base->uartsyscfg);
 
-	/* Initialize the Timer */
-	init_timer();
-
 	preloader_console_init();
 
 	/* Initalize the board header */