From patchwork Mon Aug 6 02:16:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 175231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6A62A2C008F for ; Mon, 6 Aug 2012 12:18:19 +1000 (EST) Received: from localhost ([::1]:53273 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyCtd-0008TY-Cm for incoming@patchwork.ozlabs.org; Sun, 05 Aug 2012 22:18:17 -0400 Received: from eggs.gnu.org ([208.118.235.92]:54781) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyCtA-0007nV-3y for qemu-devel@nongnu.org; Sun, 05 Aug 2012 22:17:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SyCt9-0001df-4h for qemu-devel@nongnu.org; Sun, 05 Aug 2012 22:17:48 -0400 Received: from mail-gg0-f173.google.com ([209.85.161.173]:48344) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyCt8-0001db-OQ for qemu-devel@nongnu.org; Sun, 05 Aug 2012 22:17:47 -0400 Received: by ggnp1 with SMTP id p1so1994474ggn.4 for ; Sun, 05 Aug 2012 19:17:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=58rVzgDlKujGmG+RFtEsF7AmGbwlsoRv9JvbSKJU15I=; b=nc+TMS0H/TY2LxPrcuZeJe/iB/sBAghjadzb4xPxyiGZvQ7y5Gc2fUNBeu9CK0Ao0o Oc9p3tnGeBQOSwf4aC3lyybUsSsV/aeDFvUiHn9GpNvwR9vSfjw0pdxFDDXjTkTQtyU6 7cL7fEpR9P6eLX4YBRXVxxKBddRGeBmdjfA3pzeOFsLGJocADDN2LW94GBPgMbtFZ9Vz 1+8ant/wC+edSiYKs0Fmf7hOm9pMQdzK8U77q1svGyZLkdgyIgdf9IP6s2KNK0qOPh3L gnKqbmTAMWH1L6L/vB//k75MOCQVZ7pQIpiKT4Mt+pE7+BwLm5Y9ibOZpQq1CoCIwg2u WQUg== Received: by 10.66.88.40 with SMTP id bd8mr14818221pab.36.1344219465997; Sun, 05 Aug 2012 19:17:45 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id qo8sm1289655pbb.19.2012.08.05.19.17.42 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Aug 2012 19:17:45 -0700 (PDT) From: "Peter A. G. Crosthwaite" To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Date: Mon, 6 Aug 2012 12:16:19 +1000 Message-Id: <1edafd8e8b99a7fa09cdb122f240fb181fe5c928.1344218410.git.peter.crosthwaite@petalogix.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQmcPzn4W3+yNzeBIkz3HRFbHAE1WQcAilck7EmVduak9ILQjHVQ5JN8PHcl9H9hg/tdT6Ll X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.161.173 Cc: peter.crosthwaite@petalogix.com, i.mitsyanko@samsung.com, john.williams@petalogix.com Subject: [Qemu-devel] [PATCH v5 05/15] qdev: allow multiple qdev_init_gpio_in() calls X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Allow multiple qdev_init_gpio_in() calls for the one device. The first call will define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled with different handlers. Needed when two levels of the QOM class heirachy both define GPIO functionality, as a single GPIO handler with an index selecter is not possible. Signed-off-by: Peter A. G. Crosthwaite --- hw/qdev.c | 16 +++++++++++++--- 1 files changed, 13 insertions(+), 3 deletions(-) diff --git a/hw/qdev.c b/hw/qdev.c index b5b74b9..ce91a72 100644 --- a/hw/qdev.c +++ b/hw/qdev.c @@ -293,9 +293,19 @@ BusState *qdev_get_parent_bus(DeviceState *dev) void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n) { - assert(dev->num_gpio_in == 0); - dev->num_gpio_in = n; - dev->gpio_in = qemu_allocate_irqs(handler, dev, n); + qemu_irq *new_irqs = qemu_allocate_irqs(handler, dev, n); + + if (dev->num_gpio_in == 0) { + dev->gpio_in = qemu_allocate_irqs(handler, dev, n); + } else { + qemu_irq *all_irqs = g_new(qemu_irq, n + dev->num_gpio_in); + memcpy(all_irqs, dev->gpio_in, sizeof(*all_irqs) * dev->num_gpio_in); + g_free(dev->gpio_in); + memcpy(&all_irqs[dev->num_gpio_in], new_irqs, sizeof(*all_irqs) * n), + g_free(new_irqs); + dev->gpio_in = all_irqs; + } + dev->num_gpio_in += n; } void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n)