From patchwork Thu Aug 2 01:46:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 174674 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B75CA2C0087 for ; Thu, 2 Aug 2012 12:50:01 +1000 (EST) Received: from localhost ([::1]:48146 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwkWv-0007Ic-T1 for incoming@patchwork.ozlabs.org; Wed, 01 Aug 2012 21:48:49 -0400 Received: from eggs.gnu.org ([208.118.235.92]:41121) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwkVa-0004K7-9L for qemu-devel@nongnu.org; Wed, 01 Aug 2012 21:47:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SwkVX-0000FC-UI for qemu-devel@nongnu.org; Wed, 01 Aug 2012 21:47:26 -0400 Received: from cantor2.suse.de ([195.135.220.15]:34368 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwkVX-0000Eq-KV for qemu-devel@nongnu.org; Wed, 01 Aug 2012 21:47:23 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 1B6FDA329C; Thu, 2 Aug 2012 03:47:23 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2012 03:46:58 +0200 Message-Id: <1343872026-18189-7-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1343872026-18189-1-git-send-email-afaerber@suse.de> References: <1343872026-18189-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , anthony@codemonkey.ws, mst@redhat.com Subject: [Qemu-devel] [PATCH for-1.2 v5 06/14] gt64xxx: QOM'ify GT64120 PCI host bridge X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce type constant. Introduce cast macro to drop dummy busdev field used with FROM_SYSBUS() macro that would've broken SYS_BUS_DEVICE(). Avoid accessing DeviceState indirectly through PCIHostState. Signed-off-by: Andreas Färber --- hw/gt64xxx.c | 35 ++++++++++++++++++++--------------- 1 files changed, 20 insertions(+), 15 deletions(-) diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 04831bb..0677299 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -229,9 +229,14 @@ target_phys_addr_t regname ##_length; \ MemoryRegion regname ##_mem +#define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120" + +#define GT64120_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE) + typedef struct GT64120State { - SysBusDevice busdev; PCIHostState pci; + uint32_t regs[GT_REGS]; PCI_MAPPING_ENTRY(PCI0IO); PCI_MAPPING_ENTRY(ISD); @@ -1083,31 +1088,31 @@ static void gt64120_reset(void *opaque) PCIBus *gt64120_register(qemu_irq *pic) { - SysBusDevice *s; GT64120State *d; + PCIHostState *phb; DeviceState *dev; - dev = qdev_create(NULL, "gt64120"); + dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); qdev_init_nofail(dev); - s = sysbus_from_qdev(dev); - d = FROM_SYSBUS(GT64120State, s); - d->pci.bus = pci_register_bus(&d->busdev.qdev, "pci", - gt64120_pci_set_irq, gt64120_pci_map_irq, - pic, - get_system_memory(), - get_system_io(), - PCI_DEVFN(18, 0), 4); + d = GT64120_PCI_HOST_BRIDGE(dev); + phb = &d->pci; + phb->bus = pci_register_bus(dev, "pci", + gt64120_pci_set_irq, gt64120_pci_map_irq, + pic, + get_system_memory(), + get_system_io(), + PCI_DEVFN(18, 0), 4); memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x1000); - pci_create_simple(d->pci.bus, PCI_DEVFN(0, 0), "gt64120_pci"); - return d->pci.bus; + pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); + return phb->bus; } static int gt64120_init(SysBusDevice *dev) { GT64120State *s; - s = FROM_SYSBUS(GT64120State, dev); + s = GT64120_PCI_HOST_BRIDGE(dev); /* FIXME: This value is computed from registers during reset, but some devices (e.g. VGA card) need to know it when they are registered. @@ -1162,7 +1167,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data) } static const TypeInfo gt64120_info = { - .name = "gt64120", + .name = TYPE_GT64120_PCI_HOST_BRIDGE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(GT64120State), .class_init = gt64120_class_init,