From patchwork Thu Aug 2 02:10:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 174655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5166E2C008B for ; Thu, 2 Aug 2012 12:10:39 +1000 (EST) Received: from localhost ([::1]:38410 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Swks1-0000ke-9L for incoming@patchwork.ozlabs.org; Wed, 01 Aug 2012 22:10:37 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42935) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Swkrl-0000ak-Ja for qemu-devel@nongnu.org; Wed, 01 Aug 2012 22:10:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Swkrk-0006Z6-EP for qemu-devel@nongnu.org; Wed, 01 Aug 2012 22:10:21 -0400 Received: from ozlabs.org ([203.10.76.45]:40572) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Swkrk-0006Yh-2s for qemu-devel@nongnu.org; Wed, 01 Aug 2012 22:10:20 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id D77AE2C008B; Thu, 2 Aug 2012 12:10:16 +1000 (EST) From: David Gibson To: anthony@codemonkey.ws Date: Thu, 2 Aug 2012 12:10:08 +1000 Message-Id: <1343873409-8571-2-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1343873409-8571-1-git-send-email-david@gibson.dropbear.id.au> References: <1343873409-8571-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 203.10.76.45 Cc: David Gibson , qemu-devel@nongnu.org, agraf@suse.de Subject: [Qemu-devel] [PATCH 1/2] Allow QEMUMachine to override reset sequencing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org At present the qemu_system_reset() function always performs the same basic actions on all machines. This includes running all the reset handler hooks, however the order in which they run is not controlled by the board logic. This is incorrect: any modern real hardware will generally have some sort of reset controller, sometimes a full microcontroller or even service processor which will control the order in which components on the board are reset. For one specific example, the machine level reset handlers may need to re-establish certain things in memory to meet the emulated platform's specified entry conditions, before reexecuting the guest software. re-establish the correct specified entry conditions for the emulated platform. This must happen _after_ resetting peripheral devices, or they could still be in the middle of DMA operations which would clobber the new memory content. However with the normal ordering of reset hooks, the machine is not able to register a hook which will run after the normal qdev reset registered by generic code. This patch allows the machine to take control of the sequence of operations during reset, by adding a new reset hook to the QEMUMachine. This hook is optional - without it we just use the same reset sequence as always. That logic is available in qemu_default_system_reset() to make it easy to implement the case of the machine logic just needing to do some things either before or after the normal reset. Signed-off-by: David Gibson --- hw/boards.h | 3 +++ sysemu.h | 1 + vl.c | 10 +++++++++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/boards.h b/hw/boards.h index 59c01d0..f2bfd3e 100644 --- a/hw/boards.h +++ b/hw/boards.h @@ -12,11 +12,14 @@ typedef void QEMUMachineInitFunc(ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model); +typedef void QEMUMachineResetFunc(bool report); + typedef struct QEMUMachine { const char *name; const char *alias; const char *desc; QEMUMachineInitFunc *init; + QEMUMachineResetFunc *reset; int use_scsi; int max_cpus; unsigned int no_serial:1, diff --git a/sysemu.h b/sysemu.h index 6540c79..f74319b 100644 --- a/sysemu.h +++ b/sysemu.h @@ -62,6 +62,7 @@ int qemu_powerdown_requested(void); void qemu_system_killed(int signal, pid_t pid); void qemu_kill_report(void); extern qemu_irq qemu_system_powerdown; +void qemu_default_system_reset(bool report); void qemu_system_reset(bool report); void qemu_add_exit_notifier(Notifier *notify); diff --git a/vl.c b/vl.c index 9fea320..ac47a7c 100644 --- a/vl.c +++ b/vl.c @@ -1396,7 +1396,7 @@ void qemu_unregister_reset(QEMUResetHandler *func, void *opaque) } } -void qemu_system_reset(bool report) +void qemu_default_system_reset(bool report) { QEMUResetEntry *re, *nre; @@ -1410,6 +1410,14 @@ void qemu_system_reset(bool report) cpu_synchronize_all_post_reset(); } +void qemu_system_reset(bool report) +{ + if (current_machine->reset) + current_machine->reset(report); + else + qemu_default_system_reset(report); +} + void qemu_system_reset_request(void) { if (no_reboot) {