From patchwork Tue Jul 31 21:07:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 174334 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id AE4832C0081 for ; Wed, 1 Aug 2012 07:11:46 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2186528179; Tue, 31 Jul 2012 23:10:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IOP8mOJdAhJ4; Tue, 31 Jul 2012 23:10:38 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7BE13281BD; Tue, 31 Jul 2012 23:10:09 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 96BD228181 for ; Tue, 31 Jul 2012 23:09:11 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yqNinVbMjQun for ; Tue, 31 Jul 2012 23:09:02 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 60C4D2816D for ; Tue, 31 Jul 2012 23:08:38 +0200 (CEST) Received: by pbbjt11 with SMTP id jt11so913800pbb.3 for ; Tue, 31 Jul 2012 14:08:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; bh=dZEF+1HCHNwqLdWUmFwhcKdhje1IxZ5ugdKmnPIdNgk=; b=zJy3qCk9RwURRLxrdJ10A5ueUowyNMgcw8zPgDNKdFEN4YNRKnyfGQ851dhXGgjFR7 dQP4v9h1H1WUEFLG8igahM5jj343jPxdVCe1I1i4VC2g+ffOlu7JuWVFt/3bUHSzQhcV Ug1dMsOUOlWEOb1DlAq7gITdI5EUfG/73xCcrPoWSGHXZG2h+9Oulh8vj3XOJWLiSQao nbppKonNu2KEbfJNSy7yKR9d6OmE2UCTLGn71fXdKI4CD0fVTwozcBwG1rQYm53Jn5we HeSdfAgTZwsmn0wN+ChZHMFW6hyjy6WNl6YDJVSHBZ/txb/4hT1RZyGr73xQecZn7Eyx HKkw== Received: by 10.68.220.104 with SMTP id pv8mr39817031pbc.119.1343768914035; Tue, 31 Jul 2012 14:08:34 -0700 (PDT) Received: from localhost.localdomain (ip68-230-54-74.ph.ph.cox.net. [68.230.54.74]) by mx.google.com with ESMTPS id gh9sm1026811pbc.20.2012.07.31.14.08.32 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 31 Jul 2012 14:08:33 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Tue, 31 Jul 2012 14:07:29 -0700 Message-Id: <1343768849-18521-6-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343768849-18521-1-git-send-email-trini@ti.com> References: <1343768849-18521-1-git-send-email-trini@ti.com> Subject: [U-Boot] [PATCH 5/5] am33xx: Rework pinmux functions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de - Move definition of the EEPROM contents to - Make some defines a little less generic now. - Pinmux must be done by done by SPL now. - Create 3 pinmux functions, uart0, i2c0 and board. - Add pinmux specific to Starter Kit EVM for MMC now. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 32 +++----------- arch/arm/include/asm/arch-am33xx/common_def.h | 26 ----------- arch/arm/include/asm/arch-am33xx/sys_proto.h | 28 ++++++++++++ board/ti/am335x/Makefile | 2 + board/ti/am335x/mux.c | 58 ++++++++++++++----------- 5 files changed, 68 insertions(+), 78 deletions(-) delete mode 100644 arch/arm/include/asm/arch-am33xx/common_def.h diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 0f16021..2ca4ca7 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include @@ -58,29 +58,16 @@ const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx; static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; -#define NO_OF_MAC_ADDR 3 -#define ETH_ALEN 6 -#define NAME_LEN 8 - -struct am335x_baseboard_id { - unsigned int magic; - char name[NAME_LEN]; - char version[4]; - char serial[12]; - char config[32]; - char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN]; -}; - static struct am335x_baseboard_id __attribute__((section (".data"))) header; static inline int board_is_bone(void) { - return !strncmp(header.name, "A335BONE", NAME_LEN); + return !strncmp(header.name, "A335BONE", HDR_NAME_LEN); } static inline int board_is_evm_sk(void) { - return !strncmp("A335X_SK", header.name, NAME_LEN); + return !strncmp("A335X_SK", header.name, HDR_NAME_LEN); } /* @@ -207,21 +194,18 @@ void s_init(void) if (read_eeprom() < 0) puts("Could not get board ID.\n"); + enable_board_pin_mux(&header); if (board_is_evm_sk()) { /* * EVM SK 1.2A and later use gpio0_7 to enable DDR3. * This is safe enough to do on older revs. */ - enable_gpio0_7_pin_mux(); gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); gpio_direction_output(GPIO_DDR_VTT_EN, 1); } config_ddr(board_memory_type()); #endif - - /* Enable MMC0 */ - enable_mmc0_pin_mux(); } #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) @@ -238,14 +222,10 @@ void setup_clocks_for_console(void) } /* - * Basic board specific setup + * Basic board specific setup. Pinmux has been handled already. */ int board_init(void) { - enable_uart0_pin_mux(); - - enable_i2c0_pin_mux(); - enable_i2c1_pin_mux(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (read_eeprom() < 0) puts("Could not get board ID.\n"); @@ -318,12 +298,10 @@ int board_eth_init(bd_t *bis) } if (board_is_bone()) { - enable_mii1_pin_mux(); writel(MII_MODE_ENABLE, &cdev->miisel); cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII; } else { - enable_rgmii1_pin_mux(); writel(RGMII_MODE_ENABLE, &cdev->miisel); cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII; diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h b/arch/arm/include/asm/arch-am33xx/common_def.h deleted file mode 100644 index 1fe6258..0000000 --- a/arch/arm/include/asm/arch-am33xx/common_def.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * common_def.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __COMMON_DEF_H__ -#define __COMMON_DEF_H__ - -extern void enable_uart0_pin_mux(void); -extern void enable_mmc0_pin_mux(void); -extern void enable_gpio0_7_pin_mux(void); -extern void enable_i2c0_pin_mux(void); -extern void enable_mii1_pin_mux(void); -extern void enable_rgmii1_pin_mux(void); - -#endif/*__COMMON_DEF_H__ */ diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index eef5573..8a4b248 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -19,6 +19,24 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ +/* + * AM335x parts define a system EEPROM that defines certain sub-fields. + * We use these fields to in turn see what board we are on, and what + * that might require us to set or not set. + */ +#define HDR_NO_OF_MAC_ADDR 3 +#define HDR_ETH_ALEN 6 +#define HDR_NAME_LEN 8 + +struct am335x_baseboard_id { + unsigned int magic; + char name[HDR_NAME_LEN]; + char version[4]; + char serial[12]; + char config[32]; + char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN]; +}; + #define BOARD_REV_ID 0x0 u32 get_cpu_rev(void); @@ -31,4 +49,14 @@ int print_cpuinfo(void); u32 get_device_type(void); void setup_clocks_for_console(void); void ddr_pll_config(unsigned int ddrpll_M); + +/* + * We have three pin mux functions that must exist. We must be able to enable + * uart0, for initial output and i2c0 to read the main EEPROM. We then have a + * main pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_i2c0_pin_mux(void); +void enable_board_pin_mux(struct am335x_baseboard_id *header); #endif diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile index e3609bc..ca50eef 100644 --- a/board/ti/am335x/Makefile +++ b/board/ti/am335x/Makefile @@ -18,7 +18,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o +ifdef CONFIG_SPL_BUILD COBJS := mux.o +endif SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 9907d96..c7460eb 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -13,8 +13,8 @@ * GNU General Public License for more details. */ -#include -#include +#include +#include #include #include @@ -258,7 +258,6 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, }; -#ifdef CONFIG_MMC static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ @@ -270,7 +269,17 @@ static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ {-1}, }; -#endif + +static struct module_pin_mux mmc0_pin_mux_sk_evm[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; static struct module_pin_mux i2c0_pin_mux[] = { {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | @@ -349,34 +358,33 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); } -#ifdef CONFIG_MMC -void enable_mmc0_pin_mux(void) -{ - configure_module_pin_mux(mmc0_pin_mux); -} -#endif void enable_i2c0_pin_mux(void) { configure_module_pin_mux(i2c0_pin_mux); } -void enable_i2c1_pin_mux(void) +void enable_board_pin_mux(struct am335x_baseboard_id *header) { + /* Enable pinmux that is common to all TI boards. */ configure_module_pin_mux(i2c1_pin_mux); -} - -void enable_rgmii1_pin_mux(void) -{ - configure_module_pin_mux(rgmii1_pin_mux); -} -void enable_mii1_pin_mux(void) -{ - configure_module_pin_mux(mii1_pin_mux); -} - -void enable_gpio0_7_pin_mux(void) -{ - configure_module_pin_mux(gpio0_7_pin_mux); + /* Now do board-specific muxes. */ + if (!strncmp(header->name, "A335BONE", HDR_NAME_LEN)) { + /* Beaglebone pinmux */ + configure_module_pin_mux(mii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); + } else if (!strncmp(header->config, "SKU#01", 6)) { + /* General Purpose EVM */ + configure_module_pin_mux(rgmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); + } else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) { + /* Starter Kit EVM */ + configure_module_pin_mux(gpio0_7_pin_mux); + configure_module_pin_mux(rgmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux_sk_evm); + } else { + puts("Unknown board, cannot configure pinmux."); + hang(); + } }