Patchwork [U-Boot] at91: Add support for taskit AT91SAM9G20 boards.

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Submitter Markus Hubig
Date July 30, 2012, 6:01 p.m.
Message ID <1343671291-17435-1-git-send-email-mhubig@imko.de>
Download mbox | patch
Permalink /patch/174070/
State Superseded
Delegated to: Andreas Bießmann
Headers show

Comments

Markus Hubig - July 30, 2012, 6:01 p.m.
This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
---
 board/taskit/stamp9g20/Makefile    |   52 ++++++++
 board/taskit/stamp9g20/stamp9g20.c |  199 +++++++++++++++++++++++++++++++
 boards.cfg                         |    2 +
 include/configs/stamp9g20.h        |  225 ++++++++++++++++++++++++++++++++++++
 4 files changed, 478 insertions(+), 0 deletions(-)
 create mode 100644 board/taskit/stamp9g20/Makefile
 create mode 100644 board/taskit/stamp9g20/stamp9g20.c
 create mode 100644 include/configs/stamp9g20.h
Andreas Bießmann - Aug. 1, 2012, 9:58 a.m.
Dear Markus Hubig,

first of all:

---8<---
andreas@andreas-mbp % ./tools/checkpatch.pl
U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch
WARNING: Whitespace before semicolon
#214: FILE: board/taskit/stamp9g20/stamp9g20.c:123:
+		;

total: 0 errors, 1 warnings, 484 lines checked

NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
MULTISTATEMENT_MACRO_USE_DO_WHILE

U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch has style
problems, please review.

If any of these errors are false positives, please report
them to the maintainer, see CHECKPATCH in MAINTAINERS.
--->8---

I know this part is copied from other at91 boards but I wonder how we
should handle these while-loops without content.

On 30.07.12 20:01, Markus Hubig wrote:
> This adds support for the AT91SAM9G20 boards by taskit GmbH.
> Both boards, Stamp9G20 and PortuxG20, are integrated in one
> file. PortuxG20 is basically a SBC built around the Stamp9G20.
> 
> Signed-off-by: Markus Hubig <mhubig@imko.de>
> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
> ---
>  board/taskit/stamp9g20/Makefile    |   52 ++++++++
>  board/taskit/stamp9g20/stamp9g20.c |  199 +++++++++++++++++++++++++++++++
>  boards.cfg                         |    2 +
>  include/configs/stamp9g20.h        |  225 ++++++++++++++++++++++++++++++++++++

MAINTAINER entry is missing

>  4 files changed, 478 insertions(+), 0 deletions(-)
>  create mode 100644 board/taskit/stamp9g20/Makefile
>  create mode 100644 board/taskit/stamp9g20/stamp9g20.c
>  create mode 100644 include/configs/stamp9g20.h
> 
> diff --git a/board/taskit/stamp9g20/Makefile b/board/taskit/stamp9g20/Makefile
> new file mode 100644
> index 0000000..e99bfaa
> --- /dev/null
> +++ b/board/taskit/stamp9g20/Makefile
> @@ -0,0 +1,52 @@
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <stelian@popies.net>
> +# Lead Tech Design <www.leadtechdesign.com>
> +#
> +# (C) Copyright 2012
> +# Markus Hubig <mhubig@imko.de>
> +# IMKO GmbH <www.imko.de>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).o
> +
> +COBJS-y	+= stamp9g20.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS-y))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
> +	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/taskit/stamp9g20/stamp9g20.c b/board/taskit/stamp9g20/stamp9g20.c
> new file mode 100644
> index 0000000..b87de51
> --- /dev/null
> +++ b/board/taskit/stamp9g20/stamp9g20.c
> @@ -0,0 +1,199 @@
> +/*
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * Achim Ehrlich <aehrlich@taskit.de>
> + * taskit GmbH <www.taskit.de>
> + *
> + * (C) Copyright 2012-
> + * Markus Hubig <mhubig@imko.de>
> + * IMKO GmbH <www.imko.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/at91sam9260_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +
> +#ifdef CONFIG_MACB
> +# include <net.h>
> +# include <netdev.h>
> +#endif /* CONFIG_MACB */
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static void stamp9G20_nand_hw_init(void)
> +{
> +	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> +	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> +	unsigned long csa;
> +
> +	/* Assign CS3 to NAND/SmartMedia Interface */
> +	csa = readl(&matrix->ebicsa);
> +	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
> +	writel(csa, &matrix->ebicsa);
> +
> +	/* Configure SMC CS3 for NAND/SmartMedia */
> +	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> +		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> +		&smc->cs[3].setup);
> +	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
> +		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
> +		&smc->cs[3].pulse);
> +	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
> +		&smc->cs[3].cycle);
> +	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> +		AT91_SMC_MODE_EXNW_DISABLE |
> +		AT91_SMC_MODE_DBW_8 |
> +		AT91_SMC_MODE_TDF_CYCLE(2),
> +		&smc->cs[3].mode);
> +
> +	/* Configure RDY/BSY */
> +	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> +	/* Enable NandFlash */
> +	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +
> +#ifdef CONFIG_MACB
> +static void stamp9G20_macb_hw_init(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
> +	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> +	unsigned long erstl;
> +
> +	/* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/
This comment is a bit misleading. Isn't MACB the SoC MAC component? Why
should we switch an external element to enable an internal part? Can you
please rewrite the comment to be more precise?

> +	at91_set_gpio_output(AT91_PIN_PA26, 0);
> +
> +	/* Enable EMAC clock */
> +	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);

Is it possible to move this 'enable clock' into at91_macb_hw_init()?
Does your PHY address setting still work then?
If yes, can you please send a separate patch first adding the 'enable
clock' into the correct at91_macb_hw_init()?

> +
> +	/*
> +	 * Disable pull-up on:
> +	 *	RXDV (PA17) => PHY normal mode (not Test mode)
> +	 *	ERX0 (PA14) => PHY ADDR0
> +	 *	ERX1 (PA15) => PHY ADDR1
> +	 *	ERX2 (PA25) => PHY ADDR2
> +	 *	ERX3 (PA26) => PHY ADDR3
> +	 *	ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
> +	 *
> +	 * PHY has internal pull-down
> +	 */
> +	writel(pin_to_mask(AT91_PIN_PA14) |
> +		pin_to_mask(AT91_PIN_PA15) |
> +		pin_to_mask(AT91_PIN_PA17) |
> +		pin_to_mask(AT91_PIN_PA18) |
> +		pin_to_mask(AT91_PIN_PA28),
> +		&pioa->pudr);
> +
> +	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
> +
> +	/* Need to reset PHY -> 500ms reset */
> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> +		AT91_RSTC_MR_URSTEN, &rstc->mr);

Hmm ... is it OK to generate the user reset here? I know this is the
same in at least at91sam9263ek, can you please check if we should
instead delete that bit in MR?

> +
> +	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> +
> +	/* Wait for end hardware reset */
> +	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
> +		;

Endless loop if bit is not toggling, can you please add some watchdog
reset (if you still use wdt in your board) and some timeout?
This will also solve the warning detected by checkpatch.

> +
> +	/* Restore NRST value */
> +	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
> +		&rstc->mr);
> +
> +	/* Re-enable pull-up */
> +	writel(pin_to_mask(AT91_PIN_PA14) |
> +		pin_to_mask(AT91_PIN_PA15) |
> +		pin_to_mask(AT91_PIN_PA17) |
> +		pin_to_mask(AT91_PIN_PA18) |
> +		pin_to_mask(AT91_PIN_PA28),
> +		&pioa->puer);
> +
> +	/* Initialize EMAC=MACB hardware */
> +	at91_macb_hw_init();
> +}
> +#endif /* CONFIG_MACB */
> +
> +int board_early_init_f(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> +	/* Enable clocks for all PIOs */
> +	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> +		(1 << ATMEL_ID_PIOC), &pmc->pcer);

you should initialize seriald_hw here to avoid strange characters on
serial line when switching from at91bootstrap to u-boot.

> +
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +#ifdef CONFIG_PORTUXG20
> +	gd->bd->bi_arch_number = MACH_TYPE_PORTUXG20;
> +#else
> +	gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20;
> +#endif

I would favor the generic CONFIG_MACH_TYPE here -> see
arch/arm/lib/board.c:401
Just add the definition in your board config header and remove these
lines here.

> +	/* adress of boot parameters */
> +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> +
> +	at91_set_gpio_output(AT91_PIN_PC9, 1);
> +	at91_set_gpio_output(AT91_PIN_PC5, 1);

Can you please add some comment why switching these pins?

> +
> +	at91_seriald_hw_init();
> +	stamp9G20_nand_hw_init();
> +#ifdef CONFIG_MACB
> +	stamp9G20_macb_hw_init();
> +#endif
> +
> +	return 0;
> +}
> +
> +int dram_init(void)
> +{
> +	gd->ram_size = get_ram_size(
> +		(void *)CONFIG_SYS_SDRAM_BASE,
> +		CONFIG_SYS_SDRAM_SIZE);
> +	return 0;
> +}
> +
> +#ifdef CONFIG_MACB
> +void reset_phy(void)
> +{
> +	/*
> +	 * Initialize ethernet HW addr prior to starting Linux,
> +	 * needed for nfsroot
> +	 */
> +	eth_init(gd->bd);

This is not longer required, the HW address should always be set by
generic code. Can you please check this?

> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> +	int rc = 0;
> +	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
> +	return rc;

return macb_eth_initialize()?

> +}
> +#endif /* CONFIG_MACB */
> diff --git a/boards.cfg b/boards.cfg
> index 2d36d83..9c5ba09 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -120,6 +120,8 @@ cpu9G20_nand_128M            arm         arm926ejs   cpu9260             eukrea
>  pm9261                       arm         arm926ejs   pm9261              ronetix        at91        pm9261:AT91SAM9261
>  pm9263                       arm         arm926ejs   pm9263              ronetix        at91        pm9263:AT91SAM9263
>  pm9g45                       arm         arm926ejs   pm9g45              ronetix        at91        pm9g45:AT91SAM9G45
> +portuxg20                    arm         arm926ejs   stamp9g20           taskit         at91        stamp9g20:AT91SAM9G20,CONFIG_PORTUXG20
> +stamp9g20                    arm         arm926ejs   stamp9g20           taskit         at91        stamp9g20:AT91SAM9G20
>  cam_enc_4xx                  arm         arm926ejs   cam_enc_4xx         ait            davinci     cam_enc_4xx
>  da830evm                     arm         arm926ejs   da8xxevm            davinci        davinci
>  da850_am18xxevm              arm         arm926ejs   da8xxevm            davinci        davinci     da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50
> diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h
> new file mode 100644
> index 0000000..7783a2f
> --- /dev/null
> +++ b/include/configs/stamp9g20.h
> @@ -0,0 +1,225 @@
> +/*
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * (C) Copyright 2010
> + * Achim Ehrlich <aehrlich@taskit.de>
> + * taskit GmbH <www.taskit.de>
> + *
> + * (C) Copyright 2012
> + * Markus Hubig <mhubig@imko.de>
> + * IMKO GmbH <www.imko.de>
> + *
> + * Configuation settings for the stamp9g20 CPU module.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * SoC must be defined first, before hardware.h is included.
> + * In this case SoC is defined in boards.cfg.
> + */
> +#include <asm/hardware.h>
> +
> +/*
> + * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
> + * program.  Since the linker has to swallow that define, we must use a pure
> + * hex number here!
> + */
> +#define CONFIG_SYS_TEXT_BASE		0x23f00000
> +
> +/* ARM asynchronous clock */
> +#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal   */
> +#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432MHz crystal */
> +#define CONFIG_SYS_HZ			1000		/* 1ms resolution    */
> +
> +/* Misc CPU related settings */
> +#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init()              */
> +#undef  CONFIG_USE_IRQ			/* we don't need IRQ stuff           */

just remove that, it was not defined before

> +#define CONFIG_CMDLINE_TAG		/* pass commandline to Kernel        */
> +#define CONFIG_SETUP_MEMORY_TAGS	/* pass memory defs to kernel        */
> +#define CONFIG_INITRD_TAG		/* pass initrd param to kernel       */
> +#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader  */
> +#define CONFIG_BOARD_EARLY_INIT_f	/* call board_early_init_f()         */
> +#define CONFIG_DISPLAY_CPUINFO		/* display CPU Info at startup       */
> +
> +/*
> + * SDRAM: 1 bank, 64 MB, base address 0x20000000
> + * Already initialized before u-boot gets started.
> + */
> +#define CONFIG_NR_DRAM_BANKS		1
> +#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
> +#define CONFIG_SYS_SDRAM_SIZE		(64 * (1024 << 10))
> +
> +/*
> + * Perform a SDRAM Memtest from the start of SDRAM
> + * till the beginning of the U-Boot position in RAM.
> + */
> +#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
> +#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
> +
> +/* Size of malloc() pool */
> +#define CONFIG_SYS_MALLOC_LEN \
> +	ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
> +
> +/*
> + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
> + * leaving the correct space for initial global data structure above that
> + * address while providing maximum stack area below.
> + */
> +#define CONFIG_STACKSIZE        (32 * 1024)     /* 32k regular stack size   */

CONFIG_STACKSIZE is nowhere used, please remove.

> +#define CONFIG_SYS_INIT_SP_ADDR \
> +	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
> +
> +/* NAND flash settings */
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_SYS_MAX_NAND_DEVICE	1
> +#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
> +#define CONFIG_SYS_NAND_DBW_8
> +#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
> +#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
> +#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
> +
> +/* general purpose I/O */
> +#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed   */
> +#define CONFIG_AT91_GPIO		/* enable the GPIO features         */
> +#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins  */
> +
> +/* serial console */
> +#define CONFIG_ATMEL_USART
> +#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
> +#define	CONFIG_USART_ID			ATMEL_ID_SYS
-----------^
no tab here please

> +#define CONFIG_BAUDRATE			115200
> +#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}

This is same as generic table, please remove (was added in
26750c8aee2383a026e0cf89e9310628d3a5a6a0)

> +#define CONFIG_USART3			/* USART 3 is used as DBGU          */
Well, this is a remnant ... please remove (BTW: the statement in comment
is wrong, USART3 is available beside DBGU ... ;)

> +
> +/* Ethernet configuration */
> +#define CONFIG_MACB			/* initialize the ethernet port     */
------------------------------------------------------------------------^
Can you please remove these white space? I know there are a lot of at91
config header formatted like this, but I personally dislike this style.
Especially in this case where the previous intention of aligning all
these '*/' on the 80th char of a line is still broken by other lines. I
think just a single white space is good here.

> +
> +#ifdef CONFIG_MACB

Well, you defined it some lines above, is there any case where you want
to switch the network off? If no please remove this ifdef block and just
define required stuff.

> +# define CONFIG_RMII			/* use reduced MII inteface         */
> +# define CONFIG_RESET_PHY_R		/* call reset_phy() after reloc.    */
I think this could be remove once you checked if eth_init() is really
required.

> +# define CONFIG_NET_RETRY_COUNT		20      /* # of DHCP/BOOTP retries  */
> +#endif /* CONFIG_MACB */
> +
> +/* USB configuration */
> +#define CONFIG_USB_ATMEL
> +#define CONFIG_USB_OHCI_NEW
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
> +#define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
> +
> +/* BOOTP options */
> +#ifdef CONFIG_MACB

same comment as above, if you do not want to disable MACB, remove this
ifdef.

> +# define CONFIG_BOOTP_BOOTFILESIZE
> +# define CONFIG_BOOTP_BOOTPATH
> +# define CONFIG_BOOTP_GATEWAY
> +# define CONFIG_BOOTP_HOSTNAME
> +#endif /* CONFIG_MACB */
> +
> +/* General Boot Parameter */
> +#define CONFIG_BOOTDELAY		3
> +#define CONFIG_BOOTCOMMAND		"run flashboot"
> +#define CONFIG_SYS_PROMPT		"U-Boot> "
> +#define CONFIG_SYS_CBSIZE		256
> +#define CONFIG_SYS_MAXARGS		16
> +#define CONFIG_SYS_PBSIZE \
> +	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_CMDLINE_EDITING
> +
> +/*
> + * RAM Memory address where to put the
> + * Linux Kernel bevor starting.
> + */
> +#define CONFIG_SYS_LOAD_ADDR		0x22000000
> +
> +/*
> + * The NAND Flash partitions:
> + * ==========================================
> + * 0x0000000-0x001ffff -> 128k, bootstrap
> + * 0x0020000-0x005ffff -> 256k, u-boot
> + * 0x0060000-0x007ffff -> 128k, env1
> + * 0x0080000-0x009ffff -> 128k, env2 (backup)
> + * 0x0100000-0x03fffff ->   2M, kernel

You should think about bad blocks ... 2MiB for kernel is IMHO way to
small for normal configurations (especially when you care about boot
time, think about io-/cpu-bound stuff: high compression vs fast access).
The space will be even smaller if you hit some bad blocks in this area
... I really recommend to use a bit more here for your kernel, but its
up to you whether you change it in your next patch version or not.

> + * 0x0400000-0x8000000 -> 124M, RootFS
> + */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET		(128 + 256 << 10)
> +#define CONFIG_ENV_OFFSET_REDUND	(128 + 256 + 128 << 10)
> +#define CONFIG_ENV_SIZE			(128 << 10)
> +
> +/*
> + * Predefined environment variables.
> + * Usefull to define some easy to use boot commands.
> + */
> +#define	CONFIG_EXTRA_ENV_SETTINGS					\
> +									\
> +	"basicargs=console=ttyS0,115200 mem=64M\0"			\

Only a side note ... isn't the mem parameter handled by ATAGS correctly?
Or why do you add this here?

> +									\
> +	"mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro,"		\
> +		"256k(uboot)ro,128k(env1)ro,"				\
> +		"128k(env2)ro,2M(linux),-(root)rw\0"			\
> +									\
> +	"sdboot=setenv bootargs ${basicargs} ${mtdparts} "		\
> +		"root=/dev/mmcblk0p1 rootdelay=1; "			\

another side note ... you should read about rootwait in kernel docs

> +		"nand read 0x22000000 0xA0000 0x200000; "		\
> +		"bootm 22000000\0"					\
> +									\
> +	"flashboot=setenv bootargs ${basicargs} ${mtdparts} "		\
> +		"root=/dev/mtdblock5 rootfstype=jffs2; "		\

another side note ... you should read about ubifs ;)
Don't get me wrong, these side notes are just for you information and
not a request for change!

> +		"nand read 0x22000000 0xA0000 0x200000; "		\
> +		"bootm 22000000\0"					\
> +									\
> +	"nfsboot=setenv bootargs ${basicargs} ${mtdparts} "		\
> +		"root=/dev/nfs ip=dhcp "				\
> +		"nfsroot=${serverip}:/srv/nfs/rootfs; dhcp; "		\
> +		"bootm\0"
> +
> +/* Command line & features configuration */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_SOURCE

The source command is a really useful command for scripting, you should
not disable it except you need to e.g. save space in text section. I
guess this not the case for you cause it saves just about 700 bytes in
code section.
Beside that I can not see another way for updating your device. You
disabled flash access to bootstrap, u-boot and env sections in mtdparts
so you will need u-boot to write to these sections or you need to change
these parameters in u-boot. For all these cases scripting in u-boot is
really viable. Think about ... (just another side note ;)

> +
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_USB
> +#define CONFIG_CMD_FAT
> +
> +#ifdef CONFIG_MACB
again ifdef block, see comments above

> +# define CONFIG_CMD_PING
> +# define CONFIG_CMD_DHCP
> +#endif /* CONFIG_MACB */
> +
> +#ifdef CONFIG_USE_IRQ
> +# error CONFIG_USE_IRQ not supported
> +#endif

I tend to say, remove that. I can not imagine a case where one enables
irq accidentially, this should only be done intentionally. Then this
part is not really useful.
But I know this is copied from other at91 config files.

> +
> +#endif
> 

Best regards

Andreas Bießmann
Markus Hubig - Aug. 1, 2012, 7:28 p.m.
Hello Andreas,

thanks for your responce. I will provide an updated patch based on
your comments!

On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
> ---8<---
> andreas@andreas-mbp % ./tools/checkpatch.pl
> U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch
> WARNING: Whitespace before semicolon
> #214: FILE: board/taskit/stamp9g20/stamp9g20.c:123:
> +		;
> 
> total: 0 errors, 1 warnings, 484 lines checked
> 
> NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
> MULTISTATEMENT_MACRO_USE_DO_WHILE
> 
> U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch has style
> problems, please review.
> 
> If any of these errors are false positives, please report
> them to the maintainer, see CHECKPATCH in MAINTAINERS.
> --->8---
> 
> I know this part is copied from other at91 boards but I wonder how we
> should handle these while-loops without content.

Oh I didn't recognice there is a version of checkpatch provided with
u-boot. I used the one from kernel.org which didn't put a warning out
for this one ...

> On 30.07.12 20:01, Markus Hubig wrote:
> > This adds support for the AT91SAM9G20 boards by taskit GmbH.
> > Both boards, Stamp9G20 and PortuxG20, are integrated in one
> > file. PortuxG20 is basically a SBC built around the Stamp9G20.
> > 
> > Signed-off-by: Markus Hubig <mhubig@imko.de>
> > Cc: Andreas Bießmann <andreas.devel@googlemail.com>
> > ---
> >  board/taskit/stamp9g20/Makefile    |   52 ++++++++
> >  board/taskit/stamp9g20/stamp9g20.c |  199 +++++++++++++++++++++++++++++++
> >  boards.cfg                         |    2 +
> >  include/configs/stamp9g20.h        |  225 ++++++++++++++++++++++++++++++++++++
> 
> MAINTAINER entry is missing

Fixed!

> > +#ifdef CONFIG_MACB
> > +static void stamp9G20_macb_hw_init(void)
> > +{
> > +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > +	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
> > +	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> > +	unsigned long erstl;
> > +
> > +	/* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/
> This comment is a bit misleading. Isn't MACB the SoC MAC component? Why
> should we switch an external element to enable an internal part? Can you
> please rewrite the comment to be more precise?

Hmm yes you're right. That pin enables the PHY Chip which of course is
an external component ...

> > +	at91_set_gpio_output(AT91_PIN_PA26, 0);
> > +
> > +	/* Enable EMAC clock */
> > +	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
> 
> Is it possible to move this 'enable clock' into at91_macb_hw_init()?
> Does your PHY address setting still work then?
> If yes, can you please send a separate patch first adding the 'enable
> clock' into the correct at91_macb_hw_init()?

Yes it works. I put it into arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
and will send a separate patch.

> > +	/* Need to reset PHY -> 500ms reset */
> > +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> > +		AT91_RSTC_MR_URSTEN, &rstc->mr);
> 
> Hmm ... is it OK to generate the user reset here? I know this is the
> same in at least at91sam9263ek, can you please check if we should
> instead delete that bit in MR?

MR? Sorry I don't get this one. Please explain a bit ...

> > +
> > +	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> > +
> > +	/* Wait for end hardware reset */
> > +	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
> > +		;
> 
> Endless loop if bit is not toggling, can you please add some watchdog
> reset (if you still use wdt in your board) and some timeout?
> This will also solve the warning detected by checkpatch.

Maybe something like this?

| /* Wait for end of hardware reset */
| while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
| {
| 	/* avoid shutdown by watchdog */
| 	hw_watchdog_reset();
| 	
| 	mdelay(10);
| 	timeout--;
| 	
| 	/* timeout for not getting stuck in an endless loop */
| 	if (timeout <= 0) {
| 		debug("ERROR: Timeout waiting for PHY reset!\n");
| 		break;
| 	};
| };

> > +int board_early_init_f(void)
> > +{
> > +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > +
> > +	/* Enable clocks for all PIOs */
> > +	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> > +		(1 << ATMEL_ID_PIOC), &pmc->pcer);
> 
> you should initialize seriald_hw here to avoid strange characters on
> serial line when switching from at91bootstrap to u-boot.

If I do so I don't get serial output any more ;-(

> > +#ifdef CONFIG_PORTUXG20
> > +	gd->bd->bi_arch_number = MACH_TYPE_PORTUXG20;
> > +#else
> > +	gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20;
> > +#endif
> 
> I would favor the generic CONFIG_MACH_TYPE here -> see
> arch/arm/lib/board.c:401
> Just add the definition in your board config header and remove these
> lines here.

Fixed!

> > +	/* adress of boot parameters */
> > +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> > +
> > +	at91_set_gpio_output(AT91_PIN_PC9, 1);
> > +	at91_set_gpio_output(AT91_PIN_PC5, 1);
> 
> Can you please add some comment why switching these pins?

I which I could! My documentation is not detailed enough to
figure it out. But I will write an email to taskit ...

AT91_PIN_PC9 is connected to TIOB0/NCS5/CFS1
AT91_PIN_PC5 is connected to A24/SPI1_NPCS1 (maybe the red LED)

> > +#ifdef CONFIG_MACB
> > +void reset_phy(void)
> > +{
> > +	/*
> > +	 * Initialize ethernet HW addr prior to starting Linux,
> > +	 * needed for nfsroot
> > +	 */
> > +	eth_init(gd->bd);
> 
> This is not longer required, the HW address should always be set by
> generic code. Can you please check this?

Fixed!

> > +}
> > +
> > +int board_eth_init(bd_t *bis)
> > +{
> > +	int rc = 0;
> > +	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
> > +	return rc;
> 
> return macb_eth_initialize()?

Jup!

> > +/* Misc CPU related settings */
> > +#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init()              */
> > +#undef  CONFIG_USE_IRQ			/* we don't need IRQ stuff           */
> 
> just remove that, it was not defined before

Fixed!

> > +/*
> > + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
> > + * leaving the correct space for initial global data structure above that
> > + * address while providing maximum stack area below.
> > + */
> > +#define CONFIG_STACKSIZE        (32 * 1024)     /* 32k regular stack size   */
> 
> CONFIG_STACKSIZE is nowhere used, please remove.

Fixed!

> > +#define	CONFIG_USART_ID			ATMEL_ID_SYS
> -----------^
> no tab here please

Fixed!

> > +#define CONFIG_BAUDRATE			115200
> > +#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}
> 
> This is same as generic table, please remove (was added in
> 26750c8aee2383a026e0cf89e9310628d3a5a6a0)

Fixed!

> > +#define CONFIG_USART3			/* USART 3 is used as DBGU          */
> Well, this is a remnant ... please remove (BTW: the statement in comment
> is wrong, USART3 is available beside DBGU ... ;)

Fixed!

> > +
> > +/* Ethernet configuration */
> > +#define CONFIG_MACB			/* initialize the ethernet port     */
> ------------------------------------------------------------------------^
> Can you please remove these white space? I know there are a lot of at91
> config header formatted like this, but I personally dislike this style.
> Especially in this case where the previous intention of aligning all
> these '*/' on the 80th char of a line is still broken by other lines. I
> think just a single white space is good here.

Formating source code with tabs is already broken by default! You can never get
it right ... ;-( If I look at it with my vim all is well formated ...  

Fixed ...

> > +#ifdef CONFIG_MACB
> 
> Well, you defined it some lines above, is there any case where you want
> to switch the network off? If no please remove this ifdef block and just
> define required stuff.

I thought about making it easy to disable the eth feature if one is not using
it with the stamp9g20 CPU Board ... but anyway you're right!

> > +# define CONFIG_RMII			/* use reduced MII inteface         */
> > +# define CONFIG_RESET_PHY_R		/* call reset_phy() after reloc.    */
> I think this could be remove once you checked if eth_init() is really
> required.

It's gone ...

> > +/* BOOTP options */
> > +#ifdef CONFIG_MACB
> 
> same comment as above, if you do not want to disable MACB, remove this
> ifdef.

Fixed!

> > + * The NAND Flash partitions:
> > + * ==========================================
> > + * 0x0000000-0x001ffff -> 128k, bootstrap
> > + * 0x0020000-0x005ffff -> 256k, u-boot
> > + * 0x0060000-0x007ffff -> 128k, env1
> > + * 0x0080000-0x009ffff -> 128k, env2 (backup)
> > + * 0x0100000-0x03fffff ->   2M, kernel
> 
> You should think about bad blocks ... 2MiB for kernel is IMHO way to
> small for normal configurations (especially when you care about boot
> time, think about io-/cpu-bound stuff: high compression vs fast access).
> The space will be even smaller if you hit some bad blocks in this area
> ... I really recommend to use a bit more here for your kernel, but its
> up to you whether you change it in your next patch version or not.

Increased it to 6Mb ... 

> > +	"basicargs=console=ttyS0,115200 mem=64M\0"			\
> 
> Only a side note ... isn't the mem parameter handled by ATAGS correctly?
> Or why do you add this here?

Fixed!

> > +	"sdboot=setenv bootargs ${basicargs} ${mtdparts} "		\
> > +		"root=/dev/mmcblk0p1 rootdelay=1; "			\
> 
> another side note ... you should read about rootwait in kernel docs

Fixed ;-)

> > +	"flashboot=setenv bootargs ${basicargs} ${mtdparts} "		\
> > +		"root=/dev/mtdblock5 rootfstype=jffs2; "		\
> 
> another side note ... you should read about ubifs ;)
> Don't get me wrong, these side notes are just for you information and
> not a request for change!

Keep on writing side notes! I learned a lot the last couple of hours ;-)

> > +#undef CONFIG_CMD_SOURCE
> 
> The source command is a really useful command for scripting, you should
> not disable it except you need to e.g. save space in text section. I
> guess this not the case for you cause it saves just about 700 bytes in
> code section.
> Beside that I can not see another way for updating your device. You
> disabled flash access to bootstrap, u-boot and env sections in mtdparts
> so you will need u-boot to write to these sections or you need to change
> these parameters in u-boot. For all these cases scripting in u-boot is
> really viable. Think about ... (just another side note ;)

Yes I definitly have to think about a deployment scenario and than this
will be really useful. But i just overlooked it until now ...

> > +#ifdef CONFIG_USE_IRQ
> > +# error CONFIG_USE_IRQ not supported
> > +#endif
> 
> I tend to say, remove that. I can not imagine a case where one enables
> irq accidentially, this should only be done intentionally. Then this
> part is not really useful.
> But I know this is copied from other at91 config files.

It's gone! :-)

Thank you very much for this good review! I Learned a lot and will post
the updated patches soon!

Cheers, Markus

PS.: I will send a new patch with all your requested changes already
included, not a couple of small ones based in this one? Right!?
Andreas Bießmann - Aug. 1, 2012, 8:21 p.m.
Hi Markus,

On 01.08.12 21:28, Markus Hubig wrote:
> Hello Andreas,
> 
> thanks for your responce. I will provide an updated patch based on
> your comments!
> 
> On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
>> ---8<---
>> andreas@andreas-mbp % ./tools/checkpatch.pl
>> U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch
>> WARNING: Whitespace before semicolon
>> #214: FILE: board/taskit/stamp9g20/stamp9g20.c:123:
>> +		;
>>
>> total: 0 errors, 1 warnings, 484 lines checked
>>
>> NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
>> MULTISTATEMENT_MACRO_USE_DO_WHILE
>>
>> U-Boot-at91-Add-support-for-taskit-AT91SAM9G20-boards..patch has style
>> problems, please review.
>>
>> If any of these errors are false positives, please report
>> them to the maintainer, see CHECKPATCH in MAINTAINERS.
>> --->8---
>>
>> I know this part is copied from other at91 boards but I wonder how we
>> should handle these while-loops without content.
> 
> Oh I didn't recognice there is a version of checkpatch provided with
> u-boot. I used the one from kernel.org which didn't put a warning out
> for this one ...
> 
>> On 30.07.12 20:01, Markus Hubig wrote:
>>> This adds support for the AT91SAM9G20 boards by taskit GmbH.
>>> Both boards, Stamp9G20 and PortuxG20, are integrated in one
>>> file. PortuxG20 is basically a SBC built around the Stamp9G20.
>>>
>>> Signed-off-by: Markus Hubig <mhubig@imko.de>
>>> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
>>> ---
>>>  board/taskit/stamp9g20/Makefile    |   52 ++++++++
>>>  board/taskit/stamp9g20/stamp9g20.c |  199 +++++++++++++++++++++++++++++++
>>>  boards.cfg                         |    2 +
>>>  include/configs/stamp9g20.h        |  225 ++++++++++++++++++++++++++++++++++++
>>
>> MAINTAINER entry is missing
> 
> Fixed!
> 
>>> +#ifdef CONFIG_MACB
>>> +static void stamp9G20_macb_hw_init(void)
>>> +{
>>> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>>> +	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
>>> +	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>>> +	unsigned long erstl;
>>> +
>>> +	/* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/
>> This comment is a bit misleading. Isn't MACB the SoC MAC component? Why
>> should we switch an external element to enable an internal part? Can you
>> please rewrite the comment to be more precise?
> 
> Hmm yes you're right. That pin enables the PHY Chip which of course is
> an external component ...
> 
>>> +	at91_set_gpio_output(AT91_PIN_PA26, 0);
>>> +
>>> +	/* Enable EMAC clock */
>>> +	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
>>
>> Is it possible to move this 'enable clock' into at91_macb_hw_init()?
>> Does your PHY address setting still work then?
>> If yes, can you please send a separate patch first adding the 'enable
>> clock' into the correct at91_macb_hw_init()?
> 
> Yes it works. I put it into arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
> and will send a separate patch.
> 
>>> +	/* Need to reset PHY -> 500ms reset */
>>> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>> +		AT91_RSTC_MR_URSTEN, &rstc->mr);
>>
>> Hmm ... is it OK to generate the user reset here? I know this is the
>> same in at least at91sam9263ek, can you please check if we should
>> instead delete that bit in MR?
> 
> MR? Sorry I don't get this one. Please explain a bit ...

I talked about URSTEN bit in RSTC_MR (Reset Controller Mode Register;
p99 in at91sam9g20 datasheet). The URSTEN bit set to 1 means disable low
level detection on NRST pin. Which in fact disables external reset with
the reset key. One have to check if this is true or maybe I'm wrong here.

>>> +
>>> +	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
>>> +
>>> +	/* Wait for end hardware reset */
>>> +	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
>>> +		;
>>
>> Endless loop if bit is not toggling, can you please add some watchdog
>> reset (if you still use wdt in your board) and some timeout?
>> This will also solve the warning detected by checkpatch.
> 
> Maybe something like this?
> 

> | /* Wait for end of hardware reset */
> | while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
> | {
> | 	/* avoid shutdown by watchdog */
> | 	hw_watchdog_reset();

	WATCHDOG_RESET();

> | 	
> | 	mdelay(10);
> | 	timeout--;
> | 	
> | 	/* timeout for not getting stuck in an endless loop */
> | 	if (timeout <= 0) {
> | 		debug("ERROR: Timeout waiting for PHY reset!\n");

Error messages should not use debug macro.

> | 		break;
> | 	};
> | };

For timeout stuff you could also use get_timer(0) to get current
timestamp and compare against another timestamp.

<snip>

> 
> PS.: I will send a new patch with all your requested changes already
> included, not a couple of small ones based in this one? Right!?

Yes, just a new version (v2), it is still arrived, will have a look then.

Best regards

Andreas Bießmann
Markus Hubig - Aug. 2, 2012, 1:28 p.m.
On Wed, Aug 01, 2012 at 10:21:04PM +0200, Andreas Bießmann wrote:
> On 01.08.12 21:28, Markus Hubig wrote:
> > On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
> >>> +	/* Need to reset PHY -> 500ms reset */
> >>> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> >>> +		AT91_RSTC_MR_URSTEN, &rstc->mr);
> >>
> >> Hmm ... is it OK to generate the user reset here? I know this is the
> >> same in at least at91sam9263ek, can you please check if we should
> >> instead delete that bit in MR?
> > 
> > MR? Sorry I don't get this one. Please explain a bit ...
> 
> I talked about URSTEN bit in RSTC_MR (Reset Controller Mode Register;
> p99 in at91sam9g20 datasheet). The URSTEN bit set to 1 means disable low
> level detection on NRST pin. Which in fact disables external reset with
> the reset key. One have to check if this is true or maybe I'm wrong here.

Hmm ok I'll investigate this a bit further ...

> > | 	/* avoid shutdown by watchdog */
> > | 	hw_watchdog_reset();
> 
> 	WATCHDOG_RESET();

Fixed!

> > | 	if (timeout <= 0) {
> > | 		debug("ERROR: Timeout waiting for PHY reset!\n");
> 
> Error messages should not use debug macro.

Fixed!

> For timeout stuff you could also use get_timer(0) to get current
> timestamp and compare against another timestamp.

Fixed!

Cheers, Markus
Markus Hubig - Aug. 2, 2012, 2:14 p.m.
On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
> On 30.07.12 20:01, Markus Hubig wrote:
> >

<snipp>

> > +int board_early_init_f(void)
> > +{
> > +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > +
> > +	/* Enable clocks for all PIOs */
> > +	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> > +		(1 << ATMEL_ID_PIOC), &pmc->pcer);
> 
> you should initialize seriald_hw here to avoid strange characters on
> serial line when switching from at91bootstrap to u-boot.

<snip>

> > +	/* adress of boot parameters */
> > +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> > +
> > +	at91_set_gpio_output(AT91_PIN_PC9, 1);
> > +	at91_set_gpio_output(AT91_PIN_PC5, 1);
> 
> Can you please add some comment why switching these pins?

OK now I now that PC5 switches the red LED on and there since is a
LED framework in u-boot I will use that in a later patch.

PC9 is somewhat strange. If I set it to 0 I don't have a console!

So I tried to put both

| at91_set_gpio_output(AT91_PIN_PC9, 1);
| at91_seriald_hw_init();

into board_early_init_f() to avoid the strange characters at boot time,
but again no console output ...

Further tests showed that It seems that I can't use at91_set_gpio_output()
inside board_early_init_f(). Switching on the red LED with PC5 also do not
work in board_early_init_f() ...

Any ideas?

Cheers, Markus
Markus Hubig - Aug. 3, 2012, 12:05 p.m.
On Thu, Aug 02, 2012 at 03:28:30PM +0200, Markus Hubig wrote:
> On Wed, Aug 01, 2012 at 10:21:04PM +0200, Andreas Bießmann wrote:
> > On 01.08.12 21:28, Markus Hubig wrote:
> > > On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
> > >>> +	/* Need to reset PHY -> 500ms reset */
> > >>> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> > >>> +		AT91_RSTC_MR_URSTEN, &rstc->mr);
> > >>
> > >> Hmm ... is it OK to generate the user reset here? I know this is the
> > >> same in at least at91sam9263ek, can you please check if we should
> > >> instead delete that bit in MR?
> > > 
> > > MR? Sorry I don't get this one. Please explain a bit ...
> > 
> > I talked about URSTEN bit in RSTC_MR (Reset Controller Mode Register;
> > p99 in at91sam9g20 datasheet). The URSTEN bit set to 1 means disable low
> > level detection on NRST pin. Which in fact disables external reset with
> > the reset key. One have to check if this is true or maybe I'm wrong here.
> 
> Hmm ok I'll investigate this a bit further ...

OK I looked this up in the at91sam9g20 datasheet, but as fahr as I understand
it, setting AT91_RSTC_MR_URSTEN enables the *detection* of a low level on NRST
to trigger USER RESET, while in order to perform the PHY Reset, NRST just hast
to get low. To get NRST low, one has to set EXTRST in RSTC_CR.

So to perform a PHY Reset, the correct code should be:

| /* Reset PHY for 500ms */
| writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13)
|	& ~AT91_RSTC_MR_URSTEN, &rstc->mr);
| writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);

I tested it with my PortuxG20 and Network is still working!

Unfortunatlie the Portux has no reset button, but I think for all at91sam9g20
boards with a reset button the AT91_RSTC_MR_URSTEN has to be high by default,
so somewhere in arch/arm/cpu/arm926ejs/at91/ there has to be some code like
this:

|#ifdef CONFIG_AT91_RESET_BUTTON
|struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
|writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
|#endif

Cheers, Markus
Andreas Bießmann - Aug. 6, 2012, 12:18 p.m.
Dear Markus Hubig,

On 03.08.2012 14:05, Markus Hubig wrote:
> On Thu, Aug 02, 2012 at 03:28:30PM +0200, Markus Hubig wrote:
>> On Wed, Aug 01, 2012 at 10:21:04PM +0200, Andreas Bießmann wrote:
>>> On 01.08.12 21:28, Markus Hubig wrote:
>>>> On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
>>>>>> +	/* Need to reset PHY -> 500ms reset */
>>>>>> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>>>>> +		AT91_RSTC_MR_URSTEN, &rstc->mr);
>>>>>
>>>>> Hmm ... is it OK to generate the user reset here? I know this is the
>>>>> same in at least at91sam9263ek, can you please check if we should
>>>>> instead delete that bit in MR?
>>>>
>>>> MR? Sorry I don't get this one. Please explain a bit ...
>>>
>>> I talked about URSTEN bit in RSTC_MR (Reset Controller Mode Register;
>>> p99 in at91sam9g20 datasheet). The URSTEN bit set to 1 means disable low
>>> level detection on NRST pin. Which in fact disables external reset with
>>> the reset key. One have to check if this is true or maybe I'm wrong here.
>>
>> Hmm ok I'll investigate this a bit further ...
> 
> OK I looked this up in the at91sam9g20 datasheet, but as fahr as I understand
> it, setting AT91_RSTC_MR_URSTEN enables the *detection* of a low level on NRST
> to trigger USER RESET, while in order to perform the PHY Reset, NRST just hast
> to get low. To get NRST low, one has to set EXTRST in RSTC_CR.

correct.

> 
> So to perform a PHY Reset, the correct code should be:
> 
> | /* Reset PHY for 500ms */
> | writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13)
> |	& ~AT91_RSTC_MR_URSTEN, &rstc->mr);
> | writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> 
> I tested it with my PortuxG20 and Network is still working!
> 
> Unfortunatlie the Portux has no reset button, but I think for all at91sam9g20
> boards with a reset button the AT91_RSTC_MR_URSTEN has to be high by default,
> so somewhere in arch/arm/cpu/arm926ejs/at91/ there has to be some code like
> this:
> 
> |#ifdef CONFIG_AT91_RESET_BUTTON
> |struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> |writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
> |#endif

Well, I think it is up to the board maintainer to verify the reset
switch is working.

Best regards

Andreas Bießmann
Andreas Bießmann - Aug. 6, 2012, 12:49 p.m.
Dear Markus Hubig,

On 02.08.2012 16:14, Markus Hubig wrote:
> On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
>> On 30.07.12 20:01, Markus Hubig wrote:
>>>
> 
> <snipp>
> 
>>> +int board_early_init_f(void)
>>> +{
>>> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>>> +
>>> +	/* Enable clocks for all PIOs */
>>> +	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
>>> +		(1 << ATMEL_ID_PIOC), &pmc->pcer);
>>
>> you should initialize seriald_hw here to avoid strange characters on
>> serial line when switching from at91bootstrap to u-boot.
> 
> <snip>
> 
>>> +	/* adress of boot parameters */
>>> +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>>> +
>>> +	at91_set_gpio_output(AT91_PIN_PC9, 1);
>>> +	at91_set_gpio_output(AT91_PIN_PC5, 1);
>>
>> Can you please add some comment why switching these pins?
> 
> OK now I now that PC5 switches the red LED on and there since is a
> LED framework in u-boot I will use that in a later patch.
> 
> PC9 is somewhat strange. If I set it to 0 I don't have a console!

can you please ask at taskit what function this pin has and document it
here?

> So I tried to put both
> 
> | at91_set_gpio_output(AT91_PIN_PC9, 1);
> | at91_seriald_hw_init();
> 
> into board_early_init_f() to avoid the strange characters at boot time,
> but again no console output ...
> 
> Further tests showed that It seems that I can't use at91_set_gpio_output()
> inside board_early_init_f(). Switching on the red LED with PC5 also do not
> work in board_early_init_f() ...
> 
> Any ideas?

Not currently. Maybe the PC9 has some vital functionality for UART to
work (some switch, power, ...) and is reset by another part running
after board_early_init_f()?

> 
> Cheers, Markus

Best regards

Andreas Bießmann
Markus Hubig - Aug. 6, 2012, 4:03 p.m.
On Mon, Aug 06, 2012 at 02:49:51PM +0200, Andreas Bießmann wrote:
> On 02.08.2012 16:14, Markus Hubig wrote:
> > On Wed, Aug 01, 2012 at 11:58:22AM +0200, Andreas Bießmann wrote:
> >> On 30.07.12 20:01, Markus Hubig wrote:
> > 
> > PC9 is somewhat strange. If I set it to 0 I don't have a console!
> 
> can you please ask at taskit what function this pin has and document it
> here?

I'm already waiting for an aswer ...

> > So I tried to put both
> > 
> > | at91_set_gpio_output(AT91_PIN_PC9, 1);
> > | at91_seriald_hw_init();
> > 
> > into board_early_init_f() to avoid the strange characters at boot time,
> > but again no console output ...
> > 
> > Further tests showed that It seems that I can't use at91_set_gpio_output()
> > inside board_early_init_f(). Switching on the red LED with PC5 also do not
> > work in board_early_init_f() ...
> > 
> > Any ideas?
> 
> Not currently. Maybe the PC9 has some vital functionality for UART to
> work (some switch, power, ...) and is reset by another part running
> after board_early_init_f()?

But how can I reset this PIN without using 'AT91_PIN_PC9'? I'm grep'ed all
over the source code but don't find nothing! Is there another way of setting
the PIO pins?

Cheers, Markus

Patch

diff --git a/board/taskit/stamp9g20/Makefile b/board/taskit/stamp9g20/Makefile
new file mode 100644
index 0000000..e99bfaa
--- /dev/null
+++ b/board/taskit/stamp9g20/Makefile
@@ -0,0 +1,52 @@ 
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian@popies.net>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# (C) Copyright 2012
+# Markus Hubig <mhubig@imko.de>
+# IMKO GmbH <www.imko.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-y	+= stamp9g20.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/taskit/stamp9g20/stamp9g20.c b/board/taskit/stamp9g20/stamp9g20.c
new file mode 100644
index 0000000..b87de51
--- /dev/null
+++ b/board/taskit/stamp9g20/stamp9g20.c
@@ -0,0 +1,199 @@ 
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Achim Ehrlich <aehrlich@taskit.de>
+ * taskit GmbH <www.taskit.de>
+ *
+ * (C) Copyright 2012-
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+
+#ifdef CONFIG_MACB
+# include <net.h>
+# include <netdev.h>
+#endif /* CONFIG_MACB */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void stamp9G20_nand_hw_init(void)
+{
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	unsigned long csa;
+
+	/* Assign CS3 to NAND/SmartMedia Interface */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+	writel(csa, &matrix->ebicsa);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+		&smc->cs[3].pulse);
+	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+		&smc->cs[3].cycle);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
+		AT91_SMC_MODE_DBW_8 |
+		AT91_SMC_MODE_TDF_CYCLE(2),
+		&smc->cs[3].mode);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+
+#ifdef CONFIG_MACB
+static void stamp9G20_macb_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+	unsigned long erstl;
+
+	/* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/
+	at91_set_gpio_output(AT91_PIN_PA26, 0);
+
+	/* Enable EMAC clock */
+	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+
+	/*
+	 * Disable pull-up on:
+	 *	RXDV (PA17) => PHY normal mode (not Test mode)
+	 *	ERX0 (PA14) => PHY ADDR0
+	 *	ERX1 (PA15) => PHY ADDR1
+	 *	ERX2 (PA25) => PHY ADDR2
+	 *	ERX3 (PA26) => PHY ADDR3
+	 *	ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
+	 *
+	 * PHY has internal pull-down
+	 */
+	writel(pin_to_mask(AT91_PIN_PA14) |
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA18) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->pudr);
+
+	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
+
+	/* Need to reset PHY -> 500ms reset */
+	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+		AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
+
+	/* Wait for end hardware reset */
+	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
+		;
+
+	/* Restore NRST value */
+	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
+		&rstc->mr);
+
+	/* Re-enable pull-up */
+	writel(pin_to_mask(AT91_PIN_PA14) |
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA18) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->puer);
+
+	/* Initialize EMAC=MACB hardware */
+	at91_macb_hw_init();
+}
+#endif /* CONFIG_MACB */
+
+int board_early_init_f(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	/* Enable clocks for all PIOs */
+	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+		(1 << ATMEL_ID_PIOC), &pmc->pcer);
+
+	return 0;
+}
+
+int board_init(void)
+{
+#ifdef CONFIG_PORTUXG20
+	gd->bd->bi_arch_number = MACH_TYPE_PORTUXG20;
+#else
+	gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20;
+#endif
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	at91_set_gpio_output(AT91_PIN_PC9, 1);
+	at91_set_gpio_output(AT91_PIN_PC5, 1);
+
+	at91_seriald_hw_init();
+	stamp9G20_nand_hw_init();
+#ifdef CONFIG_MACB
+	stamp9G20_macb_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+#ifdef CONFIG_MACB
+void reset_phy(void)
+{
+	/*
+	 * Initialize ethernet HW addr prior to starting Linux,
+	 * needed for nfsroot
+	 */
+	eth_init(gd->bd);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+	return rc;
+}
+#endif /* CONFIG_MACB */
diff --git a/boards.cfg b/boards.cfg
index 2d36d83..9c5ba09 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -120,6 +120,8 @@  cpu9G20_nand_128M            arm         arm926ejs   cpu9260             eukrea
 pm9261                       arm         arm926ejs   pm9261              ronetix        at91        pm9261:AT91SAM9261
 pm9263                       arm         arm926ejs   pm9263              ronetix        at91        pm9263:AT91SAM9263
 pm9g45                       arm         arm926ejs   pm9g45              ronetix        at91        pm9g45:AT91SAM9G45
+portuxg20                    arm         arm926ejs   stamp9g20           taskit         at91        stamp9g20:AT91SAM9G20,CONFIG_PORTUXG20
+stamp9g20                    arm         arm926ejs   stamp9g20           taskit         at91        stamp9g20:AT91SAM9G20
 cam_enc_4xx                  arm         arm926ejs   cam_enc_4xx         ait            davinci     cam_enc_4xx
 da830evm                     arm         arm926ejs   da8xxevm            davinci        davinci
 da850_am18xxevm              arm         arm926ejs   da8xxevm            davinci        davinci     da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50
diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h
new file mode 100644
index 0000000..7783a2f
--- /dev/null
+++ b/include/configs/stamp9g20.h
@@ -0,0 +1,225 @@ 
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2010
+ * Achim Ehrlich <aehrlich@taskit.de>
+ * taskit GmbH <www.taskit.de>
+ *
+ * (C) Copyright 2012
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
+ * Configuation settings for the stamp9g20 CPU module.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
+ * program.  Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE		0x23f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal   */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432MHz crystal */
+#define CONFIG_SYS_HZ			1000		/* 1ms resolution    */
+
+/* Misc CPU related settings */
+#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init()              */
+#undef  CONFIG_USE_IRQ			/* we don't need IRQ stuff           */
+#define CONFIG_CMDLINE_TAG		/* pass commandline to Kernel        */
+#define CONFIG_SETUP_MEMORY_TAGS	/* pass memory defs to kernel        */
+#define CONFIG_INITRD_TAG		/* pass initrd param to kernel       */
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader  */
+#define CONFIG_BOARD_EARLY_INIT_f	/* call board_early_init_f()         */
+#define CONFIG_DISPLAY_CPUINFO		/* display CPU Info at startup       */
+
+/*
+ * SDRAM: 1 bank, 64 MB, base address 0x20000000
+ * Already initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		(64 * (1024 << 10))
+
+/*
+ * Perform a SDRAM Memtest from the start of SDRAM
+ * till the beginning of the U-Boot position in RAM.
+ */
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN \
+	ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above that
+ * address while providing maximum stack area below.
+ */
+#define CONFIG_STACKSIZE        (32 * 1024)     /* 32k regular stack size   */
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+/* NAND flash settings */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed   */
+#define CONFIG_AT91_GPIO		/* enable the GPIO features         */
+#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins  */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define	CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}
+#define CONFIG_USART3			/* USART 3 is used as DBGU          */
+
+/* Ethernet configuration */
+#define CONFIG_MACB			/* initialize the ethernet port     */
+
+#ifdef CONFIG_MACB
+# define CONFIG_RMII			/* use reduced MII inteface         */
+# define CONFIG_RESET_PHY_R		/* call reset_phy() after reloc.    */
+# define CONFIG_NET_RETRY_COUNT		20      /* # of DHCP/BOOTP retries  */
+#endif /* CONFIG_MACB */
+
+/* USB configuration */
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+
+/* BOOTP options */
+#ifdef CONFIG_MACB
+# define CONFIG_BOOTP_BOOTFILESIZE
+# define CONFIG_BOOTP_BOOTPATH
+# define CONFIG_BOOTP_GATEWAY
+# define CONFIG_BOOTP_HOSTNAME
+#endif /* CONFIG_MACB */
+
+/* General Boot Parameter */
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTCOMMAND		"run flashboot"
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE \
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+
+/*
+ * RAM Memory address where to put the
+ * Linux Kernel bevor starting.
+ */
+#define CONFIG_SYS_LOAD_ADDR		0x22000000
+
+/*
+ * The NAND Flash partitions:
+ * ==========================================
+ * 0x0000000-0x001ffff -> 128k, bootstrap
+ * 0x0020000-0x005ffff -> 256k, u-boot
+ * 0x0060000-0x007ffff -> 128k, env1
+ * 0x0080000-0x009ffff -> 128k, env2 (backup)
+ * 0x0100000-0x03fffff ->   2M, kernel
+ * 0x0400000-0x8000000 -> 124M, RootFS
+ */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET		(128 + 256 << 10)
+#define CONFIG_ENV_OFFSET_REDUND	(128 + 256 + 128 << 10)
+#define CONFIG_ENV_SIZE			(128 << 10)
+
+/*
+ * Predefined environment variables.
+ * Usefull to define some easy to use boot commands.
+ */
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+									\
+	"basicargs=console=ttyS0,115200 mem=64M\0"			\
+									\
+	"mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro,"		\
+		"256k(uboot)ro,128k(env1)ro,"				\
+		"128k(env2)ro,2M(linux),-(root)rw\0"			\
+									\
+	"sdboot=setenv bootargs ${basicargs} ${mtdparts} "		\
+		"root=/dev/mmcblk0p1 rootdelay=1; "			\
+		"nand read 0x22000000 0xA0000 0x200000; "		\
+		"bootm 22000000\0"					\
+									\
+	"flashboot=setenv bootargs ${basicargs} ${mtdparts} "		\
+		"root=/dev/mtdblock5 rootfstype=jffs2; "		\
+		"nand read 0x22000000 0xA0000 0x200000; "		\
+		"bootm 22000000\0"					\
+									\
+	"nfsboot=setenv bootargs ${basicargs} ${mtdparts} "		\
+		"root=/dev/nfs ip=dhcp "				\
+		"nfsroot=${serverip}:/srv/nfs/rootfs; dhcp; "		\
+		"bootm\0"
+
+/* Command line & features configuration */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+
+#ifdef CONFIG_MACB
+# define CONFIG_CMD_PING
+# define CONFIG_CMD_DHCP
+#endif /* CONFIG_MACB */
+
+#ifdef CONFIG_USE_IRQ
+# error CONFIG_USE_IRQ not supported
+#endif
+
+#endif