From patchwork Mon Jul 30 16:49:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 174059 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C159F2C007C for ; Tue, 31 Jul 2012 02:52:10 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3B760280CF; Mon, 30 Jul 2012 18:51:11 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HjfbPbZaj256; Mon, 30 Jul 2012 18:51:11 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BC5F52810D; Mon, 30 Jul 2012 18:50:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D28F9280AA for ; Mon, 30 Jul 2012 18:49:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0izT1-47asJt for ; Mon, 30 Jul 2012 18:49:36 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 86459280A8 for ; Mon, 30 Jul 2012 18:49:23 +0200 (CEST) Received: by mail-pb0-f44.google.com with SMTP id wy7so10189090pbc.3 for ; Mon, 30 Jul 2012 09:49:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; bh=34IJRQsYs1GUw4fmHSJ/0J/AQ3KZuu04c77km6JV1mU=; b=rWxSqgEu9+h3G38sOoPvQ5I3Acwz64kpTr4qLmg87IKzHIfHc962Gl1+pJZMcXUi1E isFK3Q35phTTlSxbVgEn2ZpaHT+lx9W2Fnb2/W7lwjEbOATfXGtpfuArDJ6XykxAkYba hryk2jT1bfTMF1Kx5PPrd08/BOnexicfHYz3Js8UHyfnGGlER3A94SWAFKRqM0Ijz+yz +Tq7lswuXshBZb8T4kBMBh9L4t8bAk5mIUNmvYTxHYzbLdX9TfMHtC7WBFV3YXoxK7l5 VfL8Pggme7BPeBs9yBSG0VdEgIlphog8I+NOdjRQxgJhq5B53uVXmKubkHvlSryx+E30 9kbQ== Received: by 10.68.130.233 with SMTP id oh9mr1757275pbb.78.1343666963001; Mon, 30 Jul 2012 09:49:23 -0700 (PDT) Received: from localhost.localdomain (ip68-230-54-74.ph.ph.cox.net. [68.230.54.74]) by mx.google.com with ESMTPS id ny4sm8227805pbb.57.2012.07.30.09.49.21 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 30 Jul 2012 09:49:22 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Mon, 30 Jul 2012 09:49:02 -0700 Message-Id: <1343666943-25378-17-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343666943-25378-1-git-send-email-trini@ti.com> References: <1343666943-25378-1-git-send-email-trini@ti.com> Subject: [U-Boot] [PATCH 16/17] am33xx: Rework config_io_ctrl slightly X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This function sets a number of related registers to the same value (the registers in question all have the same field descriptions and are related in operation). Rather than defining a struct and setting the value repeatedly, just pass in the value. Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/ddr.c | 12 ++++++------ arch/arm/cpu/armv7/am33xx/emif4.c | 10 +--------- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 13 +------------ 3 files changed, 8 insertions(+), 27 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index 993f3da..597d62f 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -120,11 +120,11 @@ void config_ddr_data(int macrono, const struct ddr_data *data) writel(data->datadldiff0, &ddr_reg[macrono]->dt0dldiff0); } -void config_io_ctrl(struct ddr_ioctrl *ioctrl) +void config_io_ctrl(unsigned long val) { - writel(ioctrl->cmd1ctl, &ioctrl_reg->cm0ioctl); - writel(ioctrl->cmd2ctl, &ioctrl_reg->cm1ioctl); - writel(ioctrl->cmd3ctl, &ioctrl_reg->cm2ioctl); - writel(ioctrl->data1ctl, &ioctrl_reg->dt0ioctl); - writel(ioctrl->data2ctl, &ioctrl_reg->dt1ioctl); + writel(val, &ioctrl_reg->cm0ioctl); + writel(val, &ioctrl_reg->cm1ioctl); + writel(val, &ioctrl_reg->cm2ioctl); + writel(val, &ioctrl_reg->dt0ioctl); + writel(val, &ioctrl_reg->dt1ioctl); } diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 0190ec6..3219045 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -116,8 +116,6 @@ static void config_vtp(void) void config_ddr(short ddr_type) { - struct ddr_ioctrl ioctrl; - enable_emif_clocks(); if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) { @@ -132,13 +130,7 @@ void config_ddr(short ddr_type) writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt0rdelays0); writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt1rdelays0); - ioctrl.cmd1ctl = DDR2_IOCTRL_VALUE; - ioctrl.cmd2ctl = DDR2_IOCTRL_VALUE; - ioctrl.cmd3ctl = DDR2_IOCTRL_VALUE; - ioctrl.data1ctl = DDR2_IOCTRL_VALUE; - ioctrl.data2ctl = DDR2_IOCTRL_VALUE; - - config_io_ctrl(&ioctrl); + config_io_ctrl(DDR2_IOCTRL_VALUE); /* Set CKE to be controlled by EMIF/DDR PHY */ writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 7806e1b..ebd3077 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -174,20 +174,9 @@ struct ddr_cmdtctrl { }; /** - * Encapsulates DDR CMD & DATA io control registers. - */ -struct ddr_ioctrl { - unsigned long cmd1ctl; - unsigned long cmd2ctl; - unsigned long cmd3ctl; - unsigned long data1ctl; - unsigned long data2ctl; -}; - -/** * Configure DDR io control registers */ -void config_io_ctrl(struct ddr_ioctrl *ioctrl); +void config_io_ctrl(unsigned long val); struct ddr_ctrl { unsigned int ddrioctrl;