From patchwork Tue Jul 24 16:41:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 172958 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C88FA2C0093 for ; Wed, 25 Jul 2012 02:45:03 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755889Ab2GXQod (ORCPT ); Tue, 24 Jul 2012 12:44:33 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:33470 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753864Ab2GXQob (ORCPT ); Tue, 24 Jul 2012 12:44:31 -0400 Received: by mail-pb0-f46.google.com with SMTP id rp8so12927425pbb.19 for ; Tue, 24 Jul 2012 09:44:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=tv8pg9gQ10A9yLJEh33hxnfgBZzS4jmMVO3q5gYst0g=; b=cgN79XsWFTTdYcGE0uCmkV16ZTMSxi5yOB+uP7CWRuo90aYPbl4Nhl3XZa/p+9cd3o lOoxjyPamb4wgZro+yPqDUXLr24kkUOe4HNPHBTNbMfziVN8kREulrzZ8SrKg+pEbu5U ER4gfnnrtY5ScJNzC/sO0OuwFi+DVdBmJ28Bf7uE64+9NokOt8asFCC8UGc52nhyr2Dg dtL7tWs2IPWN0lpQZ0l1G6+YaKVL1d4J6mfi8guMGySjoT+AEtDrsl2H1qb9FQRi3cpP my5FyuaEPs9Bpc2wNOYVXGIBjwt53Hnx1yoi4MieO9cLIh+iWgPKo5BhQ8FAAPTBs3Bg pBxw== Received: by 10.68.221.72 with SMTP id qc8mr45918669pbc.63.1343148271460; Tue, 24 Jul 2012 09:44:31 -0700 (PDT) Received: from localhost.localdomain ([221.221.26.244]) by mx.google.com with ESMTPS id wk10sm7863878pbc.71.2012.07.24.09.44.21 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jul 2012 09:44:29 -0700 (PDT) From: Jiang Liu To: Bjorn Helgaas , Don Dutile Cc: Jiang Liu , Yinghai Lu , Taku Izumi , "Rafael J . Wysocki" , Kenji Kaneshige , Yijing Wang , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jiang Liu Subject: [RFC PATCH v2 31/32] PCI/et131x: use PCIe capabilities access functions to simplify implementation Date: Wed, 25 Jul 2012 00:41:16 +0800 Message-Id: <1343148077-25941-8-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343148077-25941-1-git-send-email-jiang.liu@huawei.com> References: <1343148077-25941-1-git-send-email-jiang.liu@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jiang Liu Use PCIe capabilities access functions to simplify et131x driver's implementation. Signed-off-by: Jiang Liu --- drivers/staging/et131x/et131x.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c index 5b11c5e..7410148 100644 --- a/drivers/staging/et131x/et131x.c +++ b/drivers/staging/et131x/et131x.c @@ -4001,7 +4001,6 @@ static void et131x_hwaddr_init(struct et131x_adapter *adapter) static int et131x_pci_init(struct et131x_adapter *adapter, struct pci_dev *pdev) { - int cap = pci_pcie_cap(pdev); u16 max_payload; u16 ctl; int i, rc; @@ -4010,7 +4009,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter, if (rc < 0) goto out; - if (!cap) { + if (!pci_is_pcie(pdev)) { dev_err(&pdev->dev, "Missing PCIe capabilities\n"); goto err_out; } @@ -4018,7 +4017,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter, /* Let's set up the PORT LOGIC Register. First we need to know what * the max_payload_size is */ - if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCAP, &max_payload)) { + if (pci_pcie_capability_read_word(pdev, PCI_EXP_DEVCAP, &max_payload)) { dev_err(&pdev->dev, "Could not read PCI config space for Max Payload Size\n"); goto err_out; @@ -4055,7 +4054,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter, } /* Change the max read size to 2k */ - if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl)) { + if (pci_pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl)) { dev_err(&pdev->dev, "Could not read PCI config space for Max read size\n"); goto err_out; @@ -4063,7 +4062,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter, ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | (0x04 << 12); - if (pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl)) { + if (pci_pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, ctl)) { dev_err(&pdev->dev, "Could not write PCI config space for Max read size\n"); goto err_out;