| Message ID | 1343147504-25891-8-git-send-email-jiang.liu@huawei.com |
|---|---|
| State | Superseded |
| Headers | show |
> -----Original Message----- > From: Jiang Liu [mailto:liuj97@gmail.com] > Sent: Wednesday, July 25, 2012 1:31 AM > To: Bjorn Helgaas; Don Dutile > Cc: Jiang Liu; Yinghai Lu; Izumi, Taku/泉 拓; Rafael J . Wysocki; Kaneshige, > Kenji/金重 憲治; Yijing Wang; linux-kernel@vger.kernel.org; > linux-pci@vger.kernel.org; Jiang Liu > Subject: [RFC PATCH v2 07/32] PCI/portdrv: use PCIe capabilities access > functions to simplify implementation > > From: Jiang Liu <jiang.liu@huawei.com> > > Use PCIe capabilities access functions to simplify PCIe portdrv > implementation. > > Signed-off-by: Jiang Liu <liuj97@gmail.com> > Signed-off-by: Yijing Wang <wangyijing@huawei.com> > --- > drivers/pci/pcie/portdrv_core.c | 20 ++++++++------------ > drivers/pci/pcie/portdrv_pci.c | 7 ++----- > 2 files changed, 10 insertions(+), 17 deletions(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c > b/drivers/pci/pcie/portdrv_core.c > index bf320a9..37bff83 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -76,7 +76,6 @@ static int pcie_port_enable_msix(struct pci_dev *dev, > int *vectors, int mask) > struct msix_entry *msix_entries; > int idx[PCIE_PORT_DEVICE_MAXSERVICES]; > int nr_entries, status, pos, i, nvec; > - u16 reg16; > u32 reg32; > > nr_entries = pci_msix_table_size(dev); > @@ -120,9 +119,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, > int *vectors, int mask) > * the value in this field indicates which MSI-X Table entry > is > * used to generate the interrupt message." > */ > - pos = pci_pcie_cap(dev); > - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); > - entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; > + entry = (dev->pcie_flags_reg & PCI_EXP_FLAGS_IRQ) >> 9; > if (entry >= nr_entries) > goto Error; I think we need to use pci_read_config_word() for MSI setup. "Interrupt Message Number" in the PCIe capability register can vary depending on whether MSI or MSI-x is enabled. Please see PCIe spec for details. Could you double-check that? Regards, Kenji Kaneshige > > @@ -246,7 +243,7 @@ static void cleanup_service_irqs(struct pci_dev *dev) > */ > static int get_port_device_capability(struct pci_dev *dev) > { > - int services = 0, pos; > + int services = 0; > u16 reg16; > u32 reg32; > int cap_mask = 0; > @@ -265,11 +262,9 @@ static int get_port_device_capability(struct pci_dev > *dev) > return 0; > } > > - pos = pci_pcie_cap(dev); > - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); > /* Hot-Plug Capable */ > - if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & > PCI_EXP_FLAGS_SLOT)) { > - pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, > ®32); > + if ((cap_mask & PCIE_PORT_SERVICE_HP)) { > + pci_pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, > ®32); > if (reg32 & PCI_EXP_SLTCAP_HPC) { > services |= PCIE_PORT_SERVICE_HP; > /* > @@ -277,10 +272,11 @@ static int get_port_device_capability(struct pci_dev > *dev) > * enabled by the BIOS and the hot-plug service > driver > * is not loaded. > */ > - pos += PCI_EXP_SLTCTL; > - pci_read_config_word(dev, pos, ®16); > + pci_pcie_capability_read_word(dev, > + PCI_EXP_SLTCTL, > ®16); > reg16 &= ~(PCI_EXP_SLTCTL_CCIE | > PCI_EXP_SLTCTL_HPIE); > - pci_write_config_word(dev, pos, reg16); > + pci_pcie_capability_write_word(dev, > + PCI_EXP_SLTCTL, > reg16); > } > } > /* AER capable */ > diff --git a/drivers/pci/pcie/portdrv_pci.c > b/drivers/pci/pcie/portdrv_pci.c > index 24d1463..1b2b378 100644 > --- a/drivers/pci/pcie/portdrv_pci.c > +++ b/drivers/pci/pcie/portdrv_pci.c > @@ -64,14 +64,11 @@ __setup("pcie_ports=", pcie_port_setup); > */ > void pcie_clear_root_pme_status(struct pci_dev *dev) > { > - int rtsta_pos; > u32 rtsta; > > - rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA; > - > - pci_read_config_dword(dev, rtsta_pos, &rtsta); > + pci_pcie_capability_read_dword(dev, PCI_EXP_RTSTA, &rtsta); > rtsta |= PCI_EXP_RTSTA_PME; > - pci_write_config_dword(dev, rtsta_pos, rtsta); > + pci_pcie_capability_write_dword(dev, PCI_EXP_RTSTA, rtsta); > } > > static int pcie_portdrv_restore_config(struct pci_dev *dev) > -- > 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
>> diff --git a/drivers/pci/pcie/portdrv_core.c >> b/drivers/pci/pcie/portdrv_core.c >> index bf320a9..37bff83 100644 >> --- a/drivers/pci/pcie/portdrv_core.c >> +++ b/drivers/pci/pcie/portdrv_core.c >> @@ -76,7 +76,6 @@ static int pcie_port_enable_msix(struct pci_dev *dev, >> int *vectors, int mask) >> struct msix_entry *msix_entries; >> int idx[PCIE_PORT_DEVICE_MAXSERVICES]; >> int nr_entries, status, pos, i, nvec; >> - u16 reg16; >> u32 reg32; >> >> nr_entries = pci_msix_table_size(dev); >> @@ -120,9 +119,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, >> int *vectors, int mask) >> * the value in this field indicates which MSI-X Table entry >> is >> * used to generate the interrupt message." >> */ >> - pos = pci_pcie_cap(dev); >> - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); >> - entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; >> + entry = (dev->pcie_flags_reg & PCI_EXP_FLAGS_IRQ) >> 9; >> if (entry >= nr_entries) >> goto Error; > > I think we need to use pci_read_config_word() for MSI setup. > > "Interrupt Message Number" in the PCIe capability register can vary depending > on whether MSI or MSI-x is enabled. Please see PCIe spec for details. > > Could you double-check that? > > Regards, > Kenji Kaneshige Good catch, will revert this change. Thanks! Gerry -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index bf320a9..37bff83 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -76,7 +76,6 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) struct msix_entry *msix_entries; int idx[PCIE_PORT_DEVICE_MAXSERVICES]; int nr_entries, status, pos, i, nvec; - u16 reg16; u32 reg32; nr_entries = pci_msix_table_size(dev); @@ -120,9 +119,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) * the value in this field indicates which MSI-X Table entry is * used to generate the interrupt message." */ - pos = pci_pcie_cap(dev); - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); - entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; + entry = (dev->pcie_flags_reg & PCI_EXP_FLAGS_IRQ) >> 9; if (entry >= nr_entries) goto Error; @@ -246,7 +243,7 @@ static void cleanup_service_irqs(struct pci_dev *dev) */ static int get_port_device_capability(struct pci_dev *dev) { - int services = 0, pos; + int services = 0; u16 reg16; u32 reg32; int cap_mask = 0; @@ -265,11 +262,9 @@ static int get_port_device_capability(struct pci_dev *dev) return 0; } - pos = pci_pcie_cap(dev); - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); /* Hot-Plug Capable */ - if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) { - pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, ®32); + if ((cap_mask & PCIE_PORT_SERVICE_HP)) { + pci_pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); if (reg32 & PCI_EXP_SLTCAP_HPC) { services |= PCIE_PORT_SERVICE_HP; /* @@ -277,10 +272,11 @@ static int get_port_device_capability(struct pci_dev *dev) * enabled by the BIOS and the hot-plug service driver * is not loaded. */ - pos += PCI_EXP_SLTCTL; - pci_read_config_word(dev, pos, ®16); + pci_pcie_capability_read_word(dev, + PCI_EXP_SLTCTL, ®16); reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); - pci_write_config_word(dev, pos, reg16); + pci_pcie_capability_write_word(dev, + PCI_EXP_SLTCTL, reg16); } } /* AER capable */ diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 24d1463..1b2b378 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -64,14 +64,11 @@ __setup("pcie_ports=", pcie_port_setup); */ void pcie_clear_root_pme_status(struct pci_dev *dev) { - int rtsta_pos; u32 rtsta; - rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA; - - pci_read_config_dword(dev, rtsta_pos, &rtsta); + pci_pcie_capability_read_dword(dev, PCI_EXP_RTSTA, &rtsta); rtsta |= PCI_EXP_RTSTA_PME; - pci_write_config_dword(dev, rtsta_pos, rtsta); + pci_pcie_capability_write_dword(dev, PCI_EXP_RTSTA, rtsta); } static int pcie_portdrv_restore_config(struct pci_dev *dev)