From patchwork Mon Jul 23 08:21:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Aneesh Kumar K.V" X-Patchwork-Id: 172576 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id C2FDD2C0399 for ; Mon, 23 Jul 2012 18:22:25 +1000 (EST) Received: from e23smtp04.au.ibm.com (e23smtp04.au.ibm.com [202.81.31.146]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e23smtp04.au.ibm.com", Issuer "GeoTrust SSL CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 6495A2C0299 for ; Mon, 23 Jul 2012 18:21:58 +1000 (EST) Received: from /spool/local by e23smtp04.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 23 Jul 2012 18:21:45 +1000 Received: from d23relay03.au.ibm.com (202.81.31.245) by e23smtp04.au.ibm.com (202.81.31.210) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 23 Jul 2012 18:21:42 +1000 Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay03.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q6N8Lql262390486 for ; Mon, 23 Jul 2012 18:21:52 +1000 Received: from d23av01.au.ibm.com (loopback [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q6N8LqFp017852 for ; Mon, 23 Jul 2012 18:21:52 +1000 Received: from skywalker.in.ibm.com.linux.vnet.ibm.com (skywalker.in.ibm.com [9.124.158.43] (may be forged)) by d23av01.au.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id q6N8LoJ3017661; Mon, 23 Jul 2012 18:21:51 +1000 From: "Aneesh Kumar K.V" To: Paul Mackerras Subject: Re: [PATCH -V3 09/11] arch/powerpc: Use 50 bits of VSID in slbmte In-Reply-To: <20120723000658.GH17790@bloggs.ozlabs.ibm.com> References: <1341839621-28332-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <1341839621-28332-10-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <20120723000658.GH17790@bloggs.ozlabs.ibm.com> User-Agent: Notmuch/0.13.2+63~g548a9bf (http://notmuchmail.org) Emacs/23.3.1 (x86_64-pc-linux-gnu) Date: Mon, 23 Jul 2012 13:51:49 +0530 Message-ID: <87394ij3aa.fsf@skywalker.in.ibm.com> MIME-Version: 1.0 x-cbid: 12072308-9264-0000-0000-000001F7D095 Cc: linuxppc-dev@lists.ozlabs.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Paul Mackerras writes: > On Mon, Jul 09, 2012 at 06:43:39PM +0530, Aneesh Kumar K.V wrote: >> From: "Aneesh Kumar K.V" >> >> Increase the number of valid VSID bits in slbmte instruction. >> We will use the new bits when we increase valid VSID bits. >> >> Signed-off-by: Aneesh Kumar K.V >> --- >> arch/powerpc/mm/slb_low.S | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S >> index c355af6..c1fc81c 100644 >> --- a/arch/powerpc/mm/slb_low.S >> +++ b/arch/powerpc/mm/slb_low.S >> @@ -226,7 +226,7 @@ _GLOBAL(slb_allocate_user) >> */ >> slb_finish_load: >> ASM_VSID_SCRAMBLE(r10,r9,256M) >> - rldimi r11,r10,SLB_VSID_SHIFT,16 /* combine VSID and flags */ >> + rldimi r11,r10,SLB_VSID_SHIFT,2 /* combine VSID and flags */ > > You can't do that without either changing ASM_VSID_SCRAMBLE or masking > the VSID it generates to 36 bits, since the logic in ASM_VSID_SCRAMBLE > can leave non-zero bits in the high 28 bits of the result. Similarly > for the 1T case. > How about change ASM_VSID_SCRAMBLE to clear the high bits ? That would also make it close to vsid_scramble() diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h index d24d484..173bb34 100644 --- a/arch/powerpc/include/asm/mmu-hash64.h +++ b/arch/powerpc/include/asm/mmu-hash64.h @@ -420,7 +420,8 @@ extern void slb_set_size(u16 size); * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\ addi rx,rt,1; \ srdi rx,rx,VSID_BITS_##size; /* extract 2^VSID_BITS bit */ \ - add rt,rt,rx + add rt,rt,rx; \ + clrldi rt,rt,(64 - VSID_BITS_##size); /* 4 bits per slice and we have one slice per 1TB */ #if 0 /* We can't directly include pgtable.h hence this hack */