From patchwork Fri Jul 20 07:50:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jia Liu X-Patchwork-Id: 172172 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3323F2C0122 for ; Fri, 20 Jul 2012 18:04:18 +1000 (EST) Received: from localhost ([::1]:55263 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ss812-000179-Cy for incoming@patchwork.ozlabs.org; Fri, 20 Jul 2012 03:52:48 -0400 Received: from eggs.gnu.org ([208.118.235.92]:33189) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ss80d-00005Q-4B for qemu-devel@nongnu.org; Fri, 20 Jul 2012 03:52:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ss80b-0002E8-Or for qemu-devel@nongnu.org; Fri, 20 Jul 2012 03:52:23 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:39618) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ss80b-00029B-IO for qemu-devel@nongnu.org; Fri, 20 Jul 2012 03:52:21 -0400 Received: by mail-pb0-f45.google.com with SMTP id ro12so5736088pbb.4 for ; Fri, 20 Jul 2012 00:52:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references :content-type; bh=xGmUFaspVeDdJPtivNvU7VyxfeBRHaVI0EnMqZ2luLE=; b=qODnjRPHISS/c9y11AxojwXM11luwGWk2e3atvkyEC8lqthGW/6hPna4+XTL0MLfIw xbWHIjrkGC1LODMz5nc+wGLQ/3h80t2pZ+f/COlEwizOMqglrSKl9BUUqtMpPxIKZwuG 2RpKb7QpZfWhgcydynVeisl28KEsr/PEF1W5KT4+9bktMc2+ohDLREWyp80/jtsYR/S6 aDlfCIOb8lpcMjHOugThL5QwaId5m6dkQpf+AZI9dCbeoihBQ3wGvNvxnZLCoYsTi48b Y1ZYLwhSRVqFpn/tp580G6gMcOtk3G1aMGjhCxqARERReTD+OhadtXJCpw7XQhSgmxmY aTtQ== Received: by 10.68.238.166 with SMTP id vl6mr11651748pbc.96.1342770741074; Fri, 20 Jul 2012 00:52:21 -0700 (PDT) Received: from localhost ([1.202.183.51]) by mx.google.com with ESMTPS id iw10sm2882332pbc.55.2012.07.20.00.52.16 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 20 Jul 2012 00:52:19 -0700 (PDT) From: Jia Liu To: qemu-devel@nongnu.org Date: Fri, 20 Jul 2012 15:50:42 +0800 Message-Id: <1342770653-11162-5-git-send-email-proljc@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1342770653-11162-1-git-send-email-proljc@gmail.com> References: <1342770653-11162-1-git-send-email-proljc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Subject: [Qemu-devel] [PATCH v10 04/15] target-or32: Add exception support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add OpenRISC exception support. Signed-off-by: Jia Liu --- target-openrisc/Makefile.objs | 4 ++-- target-openrisc/exception.c | 27 +++++++++++++++++++++++++++ target-openrisc/exception.h | 28 ++++++++++++++++++++++++++++ target-openrisc/exception_helper.c | 29 +++++++++++++++++++++++++++++ target-openrisc/helper.h | 3 +++ 5 files changed, 89 insertions(+), 2 deletions(-) create mode 100644 target-openrisc/exception.c create mode 100644 target-openrisc/exception.h create mode 100644 target-openrisc/exception_helper.c diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 74c4b8d..52d0158 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -1,3 +1,3 @@ obj-$(CONFIG_SOFTMMU) += machine.o -obj-y += cpu.o interrupt.o mmu.o translate.o -obj-y += interrupt_helper.o mmu_helper.o +obj-y += cpu.o exception.o interrupt.o mmu.o translate.o +obj-y += exception_helper.o interrupt_helper.o mmu_helper.o diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c new file mode 100644 index 0000000..58e53c6 --- /dev/null +++ b/target-openrisc/exception.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "exception.h" + +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp) +{ + cpu->env.exception_index = excp; + cpu_loop_exit(&cpu->env); +} diff --git a/target-openrisc/exception.h b/target-openrisc/exception.h new file mode 100644 index 0000000..4b64430 --- /dev/null +++ b/target-openrisc/exception.h @@ -0,0 +1,28 @@ +/* + * OpenRISC exception header. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_OPENRISC_EXCP_H +#define QEMU_OPENRISC_EXCP_H + +#include "cpu.h" +#include "qemu-common.h" + +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp); + +#endif /* QEMU_OPENRISC_EXCP_H */ diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c new file mode 100644 index 0000000..dab4148 --- /dev/null +++ b/target-openrisc/exception_helper.c @@ -0,0 +1,29 @@ +/* + * OpenRISC exception helper routines + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "helper.h" +#include "exception.h" + +void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) +{ + OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); + + raise_exception(cpu, excp); +} diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 7ced5ea..43b23ca 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -19,6 +19,9 @@ #include "def-helper.h" +/* exception */ +DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) + /* interrupt */ DEF_HELPER_FLAGS_1(rfe, 0, void, env)