Patchwork Commit: ARM: Document -munaligned-access

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Submitter Nick Clifton
Date July 18, 2012, 6:51 a.m.
Message ID <87k3y1d0kb.fsf@redhat.com>
Download mbox | patch
Permalink /patch/171608/
State New
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Comments

Nick Clifton - July 18, 2012, 6:51 a.m.
Hi Guys,

  I am checking in this patch to the mainline to document the ARM port's
  -munaligned-access command line option.

Cheers
  Nick

gcc/ChangeLog
2012-07-18  Nick Clifton  <nickc@redhat.com>

	* doc/invoke.texi (ARM Options): Document -munaligned-access.
Nick Clifton - July 18, 2012, 8:52 a.m.
Hi Richard,

   I have a documentation update for the 4.7 branch.  Is it OK to apply 
this ?

Cheers
   Nick

> gcc/ChangeLog
> 2012-07-18  Nick Clifton  <nickc@redhat.com>
>
>         * doc/invoke.texi (ARM Options): Document -munaligned-access.
>
> Index: gcc/doc/invoke.texi
> ===================================================================
> --- gcc/doc/invoke.texi (revision 189603)
> +++ gcc/doc/invoke.texi (working copy)
> @@ -497,7 +497,8 @@
>  -mcaller-super-interworking  -mcallee-super-interworking @gol
>  -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
>  -mword-relocations @gol
> --mfix-cortex-m3-ldrd}
> +-mfix-cortex-m3-ldrd @gol
> +-munaligned-access}
>
>  @emph{AVR Options}
>  @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
> @@ -11049,6 +11050,23 @@
>  generating these instructions.  This option is enabled by default when
>  @option{-mcpu=cortex-m3} is specified.
>
> +@item -munaligned-access
> +@itemx -mno-unaligned-access
> +@opindex munaligned-access
> +@opindex mno-unaligned-access
> +Enables (or disables) reading and writing of 16- and 32- bit values
> +from addresses that are not 16- or 32- bit aligned.  By default
> +unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
> +architectures, and enabled for all other architectures.  If unaligned
> +access is not enabled then words in packed data structures will be
> +accessed a byte at a time.
> +
> +The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the
> +generated object file to either true or false, depending upon the
> +setting of this option.  If unaligned access is enabled then the
> +preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
> +defined.
> +
>  @end table
>
>  @node AVR Options
Ramana Radhakrishnan - July 18, 2012, 9:40 a.m.
On 18 July 2012 07:51, Nick Clifton <nickc@redhat.com> wrote:
> Hi Guys,
>
>   I am checking in this patch to the mainline to document the ARM port's
>   -munaligned-access command line option.

Could you ask if RM's object to backporting this to the 4.7 branch. ?

Thanks,
ramana

>
> Cheers
>   Nick
>
> gcc/ChangeLog
> 2012-07-18  Nick Clifton  <nickc@redhat.com>
>
>         * doc/invoke.texi (ARM Options): Document -munaligned-access.
>
> Index: gcc/doc/invoke.texi
> ===================================================================
> --- gcc/doc/invoke.texi (revision 189603)
> +++ gcc/doc/invoke.texi (working copy)
> @@ -497,7 +497,8 @@
>  -mcaller-super-interworking  -mcallee-super-interworking @gol
>  -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
>  -mword-relocations @gol
> --mfix-cortex-m3-ldrd}
> +-mfix-cortex-m3-ldrd @gol
> +-munaligned-access}
>
>  @emph{AVR Options}
>  @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
> @@ -11049,6 +11050,23 @@
>  generating these instructions.  This option is enabled by default when
>  @option{-mcpu=cortex-m3} is specified.
>
> +@item -munaligned-access
> +@itemx -mno-unaligned-access
> +@opindex munaligned-access
> +@opindex mno-unaligned-access
> +Enables (or disables) reading and writing of 16- and 32- bit values
> +from addresses that are not 16- or 32- bit aligned.  By default
> +unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
> +architectures, and enabled for all other architectures.  If unaligned
> +access is not enabled then words in packed data structures will be
> +accessed a byte at a time.
> +
> +The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the
> +generated object file to either true or false, depending upon the
> +setting of this option.  If unaligned access is enabled then the
> +preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
> +defined.
> +
>  @end table
>
>  @node AVR Options
Richard Guenther - July 18, 2012, 9:59 a.m.
On Wed, 18 Jul 2012, nick clifton wrote:

> Hi Richard,
> 
>   I have a documentation update for the 4.7 branch.  Is it OK to apply this ?

Sure.

Thanks,
Richard.

> Cheers
>   Nick
> 
> > gcc/ChangeLog
> > 2012-07-18  Nick Clifton  <nickc@redhat.com>
> > 
> >         * doc/invoke.texi (ARM Options): Document -munaligned-access.
> > 
> > Index: gcc/doc/invoke.texi
> > ===================================================================
> > --- gcc/doc/invoke.texi (revision 189603)
> > +++ gcc/doc/invoke.texi (working copy)
> > @@ -497,7 +497,8 @@
> >  -mcaller-super-interworking  -mcallee-super-interworking @gol
> >  -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
> >  -mword-relocations @gol
> > --mfix-cortex-m3-ldrd}
> > +-mfix-cortex-m3-ldrd @gol
> > +-munaligned-access}
> > 
> >  @emph{AVR Options}
> >  @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
> > @@ -11049,6 +11050,23 @@
> >  generating these instructions.  This option is enabled by default when
> >  @option{-mcpu=cortex-m3} is specified.
> > 
> > +@item -munaligned-access
> > +@itemx -mno-unaligned-access
> > +@opindex munaligned-access
> > +@opindex mno-unaligned-access
> > +Enables (or disables) reading and writing of 16- and 32- bit values
> > +from addresses that are not 16- or 32- bit aligned.  By default
> > +unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
> > +architectures, and enabled for all other architectures.  If unaligned
> > +access is not enabled then words in packed data structures will be
> > +accessed a byte at a time.
> > +
> > +The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the
> > +generated object file to either true or false, depending upon the
> > +setting of this option.  If unaligned access is enabled then the
> > +preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
> > +defined.
> > +
> >  @end table
> > 
> >  @node AVR Options
> 
> 
> 
> 
>

Patch

Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 189603)
+++ gcc/doc/invoke.texi	(working copy)
@@ -497,7 +497,8 @@ 
 -mcaller-super-interworking  -mcallee-super-interworking @gol
 -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
 -mword-relocations @gol
--mfix-cortex-m3-ldrd}
+-mfix-cortex-m3-ldrd @gol
+-munaligned-access}
 
 @emph{AVR Options}
 @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
@@ -11049,6 +11050,23 @@ 
 generating these instructions.  This option is enabled by default when
 @option{-mcpu=cortex-m3} is specified.
 
+@item -munaligned-access
+@itemx -mno-unaligned-access
+@opindex munaligned-access
+@opindex mno-unaligned-access
+Enables (or disables) reading and writing of 16- and 32- bit values
+from addresses that are not 16- or 32- bit aligned.  By default
+unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
+architectures, and enabled for all other architectures.  If unaligned
+access is not enabled then words in packed data structures will be
+accessed a byte at a time.
+
+The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the
+generated object file to either true or false, depending upon the
+setting of this option.  If unaligned access is enabled then the
+preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
+defined.
+
 @end table
 
 @node AVR Options