From patchwork Mon Jul 16 03:44:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans-Peter Nilsson X-Patchwork-Id: 171123 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id D23432C00FA for ; Mon, 16 Jul 2012 13:44:37 +1000 (EST) Comment: DKIM? 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See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:Received:Received:Received:Received:Received:Date:Message-Id:From:To:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=R5PMV5HUzhbFJO5nc+ET3i2epSRZ0Rt94o/lncvqJve6TQK7bW1laNWjehheYU rbFq72NRdOk+76UkOpkjPo1y51H9hWCfG4XAEWfXZjR7OSHPiJQs5P/mgAHRzKTR WykOS9qrfGZeT9ldGBclBj9+gYLWty39gH67UZpe5deAI=; Received: (qmail 11459 invoked by alias); 16 Jul 2012 03:44:34 -0000 Received: (qmail 11444 invoked by uid 22791); 16 Jul 2012 03:44:32 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL, BAYES_00, TW_DD, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from anubis.se.axis.com (HELO anubis.se.axis.com) (195.60.68.12) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 16 Jul 2012 03:44:18 +0000 Received: from localhost (localhost [127.0.0.1]) by anubis.se.axis.com (Postfix) with ESMTP id C2C7419DD8 for ; Mon, 16 Jul 2012 05:44:17 +0200 (CEST) Received: from anubis.se.axis.com ([127.0.0.1]) by localhost (anubis.se.axis.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id M-NZmHlc1ta9 for ; Mon, 16 Jul 2012 05:44:16 +0200 (CEST) Received: from seth.se.axis.com (seth.se.axis.com [10.0.2.172]) by anubis.se.axis.com (Postfix) with ESMTP id 97CEC19D7A for ; Mon, 16 Jul 2012 05:44:16 +0200 (CEST) Received: from ignucius.se.axis.com (ignucius.se.axis.com [10.88.21.50]) by seth.se.axis.com (Postfix) with ESMTP id 957903E093; Mon, 16 Jul 2012 05:44:16 +0200 (CEST) Received: from ignucius.se.axis.com (localhost [127.0.0.1]) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) with ESMTP id q6G3iG75019675; Mon, 16 Jul 2012 05:44:16 +0200 Received: (from hp@localhost) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) id q6G3iGub019671; Mon, 16 Jul 2012 05:44:16 +0200 Date: Mon, 16 Jul 2012 05:44:16 +0200 Message-Id: <201207160344.q6G3iGub019671@ignucius.se.axis.com> From: Hans-Peter Nilsson To: gcc-patches@gcc.gnu.org Subject: CRIS atomics revisited 3/4: pattern improvements MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Microoptimizations for the atomic patterns themselves. Constant operands are so common that it seems wasteful not to handle the most common cases and avoid wasting a register. gcc/testsuite: * gcc.target/cris/20011127-1.c: Adjust to %P being a valid register operand output modifier. gcc: * config/cris/cris.c (cris_print_operand) : New cases. * config/cris/sync.md (atomic_op_op_cnstr): New code_attr. (atomic_op_op_pred): Ditto. (atomic_op_mnem_pre_op2): Renamed from atomic_op_mnem_pre; to reflect the change to include %2 in expansion. All callers changed. (qm3): New mode_attr. ("atomic_fetch_"): Use as predicate for operand 2. ("cris_atomic_fetch__1"): Update FIXME. Use "" "" for predicate and constraint for operand 2. ("atomic_compare_and_swap"): Add FIXME. Change predicate to nonmemory_operand for operand 3. ("cris_atomic_compare_and_swap_1"): Change operand 3 to exclude memory. Improve emitted sync code for v10 and v32. Use instead of for size designator for cmp. brgds, H-P Index: config/cris/cris.c =================================================================== --- config/cris/cris.c (revision 189499) +++ config/cris/cris.c (working copy) @@ -981,6 +981,53 @@ cris_print_operand (FILE *file, rtx x, i fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq"); return; + case 'P': + /* For const_int operands, print the additive mnemonic and the + modified operand (byte-sized operands don't save anything): + N=MIN_INT..-65536: add.d N + -65535..-64: subu.w -N + -63..-1: subq -N + 0..63: addq N + 64..65535: addu.w N + 65536..MAX_INT: add.d N. + (Emitted mnemonics are capitalized to simplify testing.) + For anything else (N.B: only register is valid), print "add.d". */ + if (REG_P (operand)) + { + fprintf (file, "Add.d "); + + /* Deal with printing the operand by dropping through to the + normal path. */ + break; + } + else + { + int val; + gcc_assert (CONST_INT_P (operand)); + + val = INTVAL (operand); + if (!IN_RANGE (val, -65535, 65535)) + fprintf (file, "Add.d %d", val); + else if (val <= -64) + fprintf (file, "Subu.w %d", -val); + else if (val <= -1) + fprintf (file, "Subq %d", -val); + else if (val <= 63) + fprintf (file, "Addq %d", val); + else if (val <= 65535) + fprintf (file, "Addu.w %d", val); + return; + } + break; + + case 'q': + /* If the operand is an integer -31..31, print "q" else ".d". */ + if (CONST_INT_P (operand) && IN_RANGE (INTVAL (operand), -31, 31)) + fprintf (file, "q"); + else + fprintf (file, ".d"); + return; + case 'd': /* If this is a GOT symbol, force it to be emitted as :GOT and :GOTPLT regardless of -fpic (i.e. not as :GOT16, :GOTPLT16). Index: config/cris/sync.md =================================================================== --- config/cris/sync.md (revision 189501) +++ config/cris/sync.md (working copy) @@ -73,17 +73,32 @@ (define_code_iterator atomic_op [plus mi (define_code_attr atomic_op_name [(plus "add") (minus "sub") (and "and") (ior "or") (xor "xor") (mult "nand")]) +;; The operator nonatomic-operand can be memory, constant or register +;; for all but xor. We can't use memory or addressing modes with +;; side-effects though, so just use registers and literal constants. +(define_code_attr atomic_op_op_cnstr + [(plus "ri") (minus "ri") (and "ri") (ior "ri") (xor "r") (mult "ri")]) + +(define_code_attr atomic_op_op_pred + [(plus "nonmemory_operand") (minus "nonmemory_operand") + (and "nonmemory_operand") (ior "nonmemory_operand") + (xor "register_operand") (mult "nonmemory_operand")]) + ;; Pairs of these are used to insert the "not" after the "and" for nand. -(define_code_attr atomic_op_mnem_pre ;; Upper-case only to sinplify testing. - [(plus "Add.d") (minus "Sub.d") (and "And.d") (ior "Or.d") (xor "Xor") - (mult "aNd.d")]) +(define_code_attr atomic_op_mnem_pre_op2 ;; Upper-case only to simplify testing. + [(plus "%P2") (minus "Sub.d %2") (and "And%q2 %2") (ior "Or%q2 %2") (xor "Xor %2") + (mult "aNd%q2 %2")]) + (define_code_attr atomic_op_mnem_post_op3 [(plus "") (minus "") (and "") (ior "") (xor "") (mult "not %3\;")]) +;; For SImode, emit "q" for operands -31..31. +(define_mode_attr qm3 [(SI "%q3") (HI ".w") (QI ".b")]) + (define_expand "atomic_fetch_" [(match_operand:BWD 0 "register_operand") (match_operand:BWD 1 "memory_operand") - (match_operand:BWD 2 "register_operand") + (match_operand:BWD 2 "") (match_operand 3) (atomic_op:BWD (match_dup 0) (match_dup 1))] "" @@ -109,8 +124,9 @@ (define_insn "cris_atomic_fetch_" ""))) (set (match_operand:BWD 0 "register_operand" "=&r") (match_dup 1)) (clobber (match_scratch:SI 3 "=&r"))] @@ -125,7 +141,7 @@ (define_insn "cris_atomic_fetch_ %1,%0\;" "move.d %0,%3\;" - " %2,%3\;" + ",%3\;" "ax\;" "move %3,%1\;" "bcs .Lsync.%=\;" @@ -136,7 +152,7 @@ (define_insn "cris_atomic_fetch_ %1,%0\;" "move.d %0,%3\;" - " %2,%3\;" + ",%3\;" "ax\;" "move %3,%1\;" "bwf .Lsync.%=\;" @@ -167,12 +183,12 @@ (define_insn "cris_atomic_fetch_ %2,%3\;" + ",%3\;" "ba .Lsync.irqoff.%=\;" "move %3,%1\n" ".Lsync.irqon.%=:\;" - " %2,%3\;" + ",%3\;" "move %3,%1\;" "ei\n" ".Lsync.irqoff.%=:"; @@ -232,32 +248,30 @@ (define_insn "cris_atomic_compare_and_sw { if (TARGET_V32) return - "clearf p\n" - ".Lsync.repeat.%=:\;" + "\n.Lsync.repeat.%=:\;" + "clearf p\;" "move %2,%1\;" - "cmp %3,%1\;" + "cmp %3,%1\;" "bne .Lsync.after.%=\;" - "seq %0\;" - "ax\;" + "move %4,%2\;" - "bcs .Lsync.repeat.%=\;" - "clearf p\n" - ".Lsync.after.%=:"; + "bcs .Lsync.repeat.%=\n" + ".Lsync.after.%=:\;" + "seq %0"; else if (cris_cpu_version == 10) return - "clearf\n" - ".Lsync.repeat.%=:\;" + "\n.Lsync.repeat.%=:\;" + "clearf\;" "move %2,%1\;" - "cmp %3,%1\;" + "cmp %3,%1\;" "bne .Lsync.after.%=\;" - "seq %0\;" - "ax\;" + "move %4,%2\;" - "bwf .Lsync.repeat.%=\;" - "clearf\n" - ".Lsync.after.%=:"; + "bwf .Lsync.repeat.%=\n" + ".Lsync.after.%=:\;" + "seq %0"; else { /* This one is for CRIS versions without load-locked-store-conditional @@ -284,14 +298,14 @@ (define_insn "cris_atomic_compare_and_sw "bmi .Lsync.irqon.%=\;" "nop\;" - "cmp %3,%1\;" + "cmp %3,%1\;" "bne .Lsync.after.%=\;" "seq %0\;" "ba .Lsync.after.%=\;" "move %4,%2\n" ".Lsync.irqon.%=:\;" - "cmp %3,%1\;" + "cmp %3,%1\;" "bne .Lsync.after.%=\;" "seq %0\;" "move %4,%2\;" Index: testsuite/gcc.target/cris/20011127-1.c =================================================================== --- testsuite/gcc.target/cris/20011127-1.c (revision 189499) +++ testsuite/gcc.target/cris/20011127-1.c (working copy) @@ -17,7 +17,6 @@ foo (void) them. */ asm ("\n;# %b0" : : "r" (0)); /* { dg-error "modifier" } */ asm ("\n;# %v0" : : "r" (0)); /* { dg-error "modifier" } */ - asm ("\n;# %P0" : : "r" (0)); /* { dg-error "modifier" } */ asm ("\n;# %p0" : : "r" (0)); /* { dg-error "modifier" } */ asm ("\n;# %z0" : : "r" (0)); /* { dg-error "modifier" } */ asm ("\n;# %H0" : : "F" (0.5)); /* { dg-error "modifier" } */