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CRIS atomics revisited 2/4: don't allow a memory operand (with possible side-effects)

Message ID 201207160343.q6G3h9Pp019619@ignucius.se.axis.com
State New
Headers show

Commit Message

Hans-Peter Nilsson July 16, 2012, 3:43 a.m. UTC 
Buglet in "atomic_compare_and_swap<mode>", allowing (in theory)
a volatile or post-increment memory operand.  Simplest and
safest fixed by excluding all memory operands.

gcc:
	* config/cris/sync.md ("atomic_compare_and_swap<mode>"): Change
	predicate to nonmemory_operand for operand 3.  Add FIXME.
	("cris_atomic_compare_and_swap<mode>_1"): Change predicates and
	constraints for operand 3 to exclude memory.


brgds, H-P
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Patch

Index: config/cris/sync.md
===================================================================
--- config/cris/sync.md	(revision 189500)
+++ config/cris/sync.md	(working copy)
@@ -184,11 +184,12 @@  (define_insn "cris_atomic_fetch_<atomic_
 ;; can_compare_and_swap_p call in omp-low.c, 4.8 era).  We'd slightly
 ;; prefer atomic_exchange<mode> over this, but having both would be
 ;; redundant.
+;; FIXME: handle memory without side-effects for operand[3].
 (define_expand "atomic_compare_and_swap<mode>"
   [(match_operand:SI 0 "register_operand")
    (match_operand:BWD 1 "register_operand")
    (match_operand:BWD 2 "memory_operand")
-   (match_operand:BWD 3 "general_operand")
+   (match_operand:BWD 3 "nonmemory_operand")
    (match_operand:BWD 4 "register_operand")
    (match_operand 5)
    (match_operand 6)
@@ -218,7 +219,7 @@  (define_insn "cris_atomic_compare_and_sw
   [(set (match_operand:SI 0 "register_operand" "=&r")
 	(unspec_volatile:SI
 	 [(match_operand:BWD 2 "memory_operand" "+Q")
-	  (match_operand:BWD 3 "general_operand" "g")]
+	  (match_operand:BWD 3 "nonmemory_operand" "ri")]
 	 CRIS_UNSPEC_ATOMIC_SWAP_BOOL))
    (set (match_operand:BWD 1 "register_operand" "=&r") (match_dup 2))
    (set (match_dup 2)