From patchwork Fri Jul 13 04:34:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jia Liu X-Patchwork-Id: 170791 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BADFB2C0337 for ; Fri, 13 Jul 2012 15:17:18 +1000 (EST) Received: from localhost ([::1]:43366 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SpXcF-00063f-1g for incoming@patchwork.ozlabs.org; Fri, 13 Jul 2012 00:36:31 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56721) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SpXbx-0005rh-Qu for qemu-devel@nongnu.org; Fri, 13 Jul 2012 00:36:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SpXbv-0005DO-Lq for qemu-devel@nongnu.org; Fri, 13 Jul 2012 00:36:13 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:51254) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SpXbv-0004pv-FA for qemu-devel@nongnu.org; Fri, 13 Jul 2012 00:36:11 -0400 Received: by mail-pb0-f45.google.com with SMTP id ro12so5077097pbb.4 for ; Thu, 12 Jul 2012 21:36:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :content-type; bh=7W6sgcq/Ny8gdIcgfUMjW6nv91XiUTxYO80GRjd0bDI=; b=kpua5kREFg8yJjnUYAip13V4xXDkr+sNtPgtgPTI80vcShbFX1R+pSQbHYNuGQnkVs vAamCejKuOBQAWTYD4i1z/RLlS8J7BmV/IEwWAlNnEfi+w2UMrLBIOJuNtoufPFo1iEO XTnE2J5H0cC0OOQN35c9ODjwdLMp7w+1C+LI/rTaKnJ+97aTGXjfShcD8BMP5WNvMtBI GKSu/BN/lhAqFP4TgODex7oqE7xUha3JfEoZZPT9GsTMgAjnK/jBU1U4e7PU4I0b0Z70 reUmHds2j3L1jIZM4vWXCxT6GsI+ytffXztcUoUImt9dD9qes4IiQTJPYY35Kv/PaCmy sKKA== Received: by 10.68.196.228 with SMTP id ip4mr188303pbc.82.1342154171076; Thu, 12 Jul 2012 21:36:11 -0700 (PDT) Received: from localhost ([1.202.183.51]) by mx.google.com with ESMTPS id pe2sm5191005pbc.59.2012.07.12.21.36.06 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 12 Jul 2012 21:36:09 -0700 (PDT) From: Jia Liu To: qemu-devel@nongnu.org Date: Fri, 13 Jul 2012 12:34:57 +0800 Message-Id: <1342154108-798-5-git-send-email-proljc@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1342154108-798-1-git-send-email-proljc@gmail.com> References: <1342154108-798-1-git-send-email-proljc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: afaerber@suse.de Subject: [Qemu-devel] [PATCH v9 04/15] target-or32: Add exception support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add OpenRISC exception support. Signed-off-by: Jia Liu --- target-openrisc/Makefile.objs | 4 ++-- target-openrisc/exception.c | 27 +++++++++++++++++++++++++++ target-openrisc/exception.h | 28 ++++++++++++++++++++++++++++ target-openrisc/exception_helper.c | 29 +++++++++++++++++++++++++++++ target-openrisc/helper.h | 3 +++ 5 files changed, 89 insertions(+), 2 deletions(-) create mode 100644 target-openrisc/exception.c create mode 100644 target-openrisc/exception.h create mode 100644 target-openrisc/exception_helper.c diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 74c4b8d..52d0158 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -1,3 +1,3 @@ obj-$(CONFIG_SOFTMMU) += machine.o -obj-y += cpu.o interrupt.o mmu.o translate.o -obj-y += interrupt_helper.o mmu_helper.o +obj-y += cpu.o exception.o interrupt.o mmu.o translate.o +obj-y += exception_helper.o interrupt_helper.o mmu_helper.o diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c new file mode 100644 index 0000000..67f6054 --- /dev/null +++ b/target-openrisc/exception.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "exception.h" + +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp) +{ + cpu->env.exception_index = excp; + cpu_loop_exit(&cpu->env); +} diff --git a/target-openrisc/exception.h b/target-openrisc/exception.h new file mode 100644 index 0000000..902c89c --- /dev/null +++ b/target-openrisc/exception.h @@ -0,0 +1,28 @@ +/* + * OpenRISC exception header. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_OPENRISC_EXCP_H +#define QEMU_OPENRISC_EXCP_H + +#include "cpu.h" +#include "qemu-common.h" + +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp); + +#endif /* QEMU_OPENRISC_EXCP_H */ diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c new file mode 100644 index 0000000..dfc6dfa --- /dev/null +++ b/target-openrisc/exception_helper.c @@ -0,0 +1,29 @@ +/* + * OpenRISC exception helper routines + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "helper.h" +#include "exception.h" + +void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) +{ + OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); + + raise_exception(cpu, excp); +} diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 16d99b6..4e2a49f 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -19,6 +19,9 @@ #include "def-helper.h" +/* exception */ +DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) + /* interrupt */ DEF_HELPER_FLAGS_1(rfe, 0, void, env)