From patchwork Wed Jul 11 20:37:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Narayanan X-Patchwork-Id: 170509 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 40D172C01B4 for ; Thu, 12 Jul 2012 06:37:45 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C90432807F; Wed, 11 Jul 2012 22:37:43 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id t622MH3p4Dwj; Wed, 11 Jul 2012 22:37:43 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E911C28080; Wed, 11 Jul 2012 22:37:41 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 812E828080 for ; Wed, 11 Jul 2012 22:37:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DQsKEpGy6FWW for ; Wed, 11 Jul 2012 22:37:38 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bk0-f44.google.com (mail-bk0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id B35872807F for ; Wed, 11 Jul 2012 22:37:38 +0200 (CEST) Received: by bkty7 with SMTP id y7so1286321bkt.3 for ; Wed, 11 Jul 2012 13:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=Y5Pe4MXbM8r8gX/OZgUwIxh00hIm81FPE7USqA3ucZg=; b=js2yMU13EFziAsEOapEpw3/aBIx1x02PQKKmUsGs7mcUPjBIN/VXBzEUebjOOdXwK5 T+11RHVRGwuG4ZoucWm1pf7qDnXx7tgLh7X7Wm8P4rXeIq7z0qGNkpX9HM7ICiTJbVo1 N3bBbU3UMqMM8U5Ih2HyWaKy8fngCQYgrv4SifXQQyTyEhNLbP6UmnVCu8VWHZBCODxw 4bA6nmhZ/xOyOSmVxY9Kh1ddSZkzbWiV/esPjMEiLorK2MVqY2Pnhd2o1z3LWTFGUJro wi11P+fhC9fbt7GidG8QSwCJBDQLjKW2DKNoa6PM8qBqv+jkXX0Zrbrlca9FdQTs9Ni3 ZBBA== Received: by 10.204.153.28 with SMTP id i28mr21829649bkw.19.1342039058383; Wed, 11 Jul 2012 13:37:38 -0700 (PDT) Received: from [172.30.1.44] (p578bbfc5.dip0.t-ipconnect.de. [87.139.191.197]) by mx.google.com with ESMTPS id c18sm1860623bkv.8.2012.07.11.13.37.32 (version=SSLv3 cipher=OTHER); Wed, 11 Jul 2012 13:37:37 -0700 (PDT) Message-ID: <4FFDE406.4030901@gmail.com> Date: Wed, 11 Jul 2012 22:37:26 +0200 From: Vikram Narayanan User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:10.0.2) Gecko/20120216 Thunderbird/10.0.2 MIME-Version: 1.0 To: u-boot@lists.denx.de References: <4FFDE3A9.7080804@gmail.com> In-Reply-To: <4FFDE3A9.7080804@gmail.com> Subject: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Driver for BCM2835 SoC. This gives the basic functionality of setting/clearing the output. Signed-off-by: Vikram Narayanan Cc: Stephen Warren Cc: Albert Aribaud --- arch/arm/include/asm/arch-bcm2835/gpio.h | 71 ++++++++++++++++++++++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio_bcm2835.c | 87 ++++++++++++++++++++++++++++++ 3 files changed, 159 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h create mode 100644 drivers/gpio/gpio_bcm2835.c diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h new file mode 100644 index 0000000..3ab06e0 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/gpio.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2012 Vikram Narayananan + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _BCM2835_GPIO_H_ +#define _BCM2835_GPIO_H_ + +#define BCM2835_GPIO_BASE 0x7E200000 +#define BCM2835_NUM_GPIOS 53 + +#define BCM2835_GPIO_FSEL_MASK 0x7 +#define BCM2835_GPIO_INPUT 0x0 +#define BCM2835_GPIO_OUTPUT 0x1 +#define BCM2835_GPIO_ALT0 0x2 +#define BCM2835_GPIO_ALT1 0x3 +#define BCM2835_GPIO_ALT2 0x4 +#define BCM2835_GPIO_ALT3 0x5 +#define BCM2835_GPIO_ALT4 0x6 +#define BCM2835_GPIO_ALT5 0x7 + +#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1) +#define BCM2835_GPIO_COMMON_MASK(gpio) (gpio & 0x1f) + +#define BCM2835_GPIO_FSEL_BANK(gpio) (gpio / 10) +#define BCM2835_GPIO_FSEL_SHIFT(gpio) ((gpio % 10) * 3) + +struct bcm_gpio_regs { + u32 gpfsel[6]; + u32 reserved1; + u32 gpset[2]; + u32 reserved2; + u32 gpclr[2]; + u32 reserved3; + u32 gplev[2]; + u32 reserved4; + u32 gpeds[2]; + u32 reserved5; + u32 gpren[2]; + u32 reserved6; + u32 gpfen[2]; + u32 reserved7; + u32 gphen[2]; + u32 reserved8; + u32 gplen[2]; + u32 reserved9; + u32 gparen[2]; + u32 reserved10; + u32 gppud; + u32 gppudclk[2]; +}; + +#endif /* _BCM2835_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index fb3b09a..7653e84 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -39,6 +39,7 @@ COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o +COBJS-$(CONFIG_BCM2835_GPIO) += gpio_bcm2835.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/gpio_bcm2835.c b/drivers/gpio/gpio_bcm2835.c new file mode 100644 index 0000000..23cdd90 --- /dev/null +++ b/drivers/gpio/gpio_bcm2835.c @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2012 Vikram Narayananan + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +inline int gpio_is_valid(unsigned gpio) +{ + return (gpio > BCM2835_NUM_GPIOS) ? 0 : 1; +} + +int gpio_request(unsigned gpio, const char *label) +{ + return (gpio_is_valid(gpio)) ? 1 : 0; +} + +int gpio_free(unsigned gpio) +{ + return 0; +} + +int gpio_direction_input(unsigned gpio) +{ + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE; + unsigned val; + + val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); + val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); + writel(val, reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); +} + +int gpio_direction_output(unsigned gpio, int value) +{ + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE; + unsigned val; + + val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); + val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio)); + val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio)); + writel(val, reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); + + if (value) + gpio_set_value(gpio, value); +} + +int gpio_get_value(unsigned gpio) +{ + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE; + unsigned val; + + val = readl(®->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]); + + return (val >> BCM2835_GPIO_COMMON_MASK(gpio)) & 0x1; +} + +int gpio_set_value(unsigned gpio, int value) +{ + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE; + u32 *output_reg = value ? reg->gpset : reg->gpclr; + + writel(1 << BCM2835_GPIO_COMMON_MASK(gpio), + output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]); + + return 0; +} +