From patchwork Wed Jul 11 12:31:56 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hayes Wang X-Patchwork-Id: 170459 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1E2E12C01B4 for ; Wed, 11 Jul 2012 22:31:28 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757429Ab2GKMbK (ORCPT ); Wed, 11 Jul 2012 08:31:10 -0400 Received: from rtits2.realtek.com ([60.250.210.242]:52190 "EHLO rtits2.realtek.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753486Ab2GKMbI (ORCPT ); Wed, 11 Jul 2012 08:31:08 -0400 X-SpamFilter-By: BOX Solutions SpamTrap 5.19 with qID q6BCV1MG009858, This message is released by code: ctlocs8528 Received: from mail.realtek.com.tw (mail.realtek.com.tw[172.21.1.180]) by rtits2.realtek.com (8.14.5/2.19/5.24) with ESMTP id q6BCV1MG009858; Wed, 11 Jul 2012 20:31:01 +0800 Received: from fc17.localdomain (172.21.71.152) by RTITCAS1.realtek.com.tw (172.21.1.184) with Microsoft SMTP Server id 8.3.245.1; Wed, 11 Jul 2012 20:31:02 +0800 From: Hayes Wang To: CC: , , Hayes Wang Subject: [PATCH net-next] r8169: Remove rtl_ocpdr_cond Date: Wed, 11 Jul 2012 20:31:56 +0800 Message-ID: <1342009916-1519-1-git-send-email-hayeswang@realtek.com> X-Mailer: git-send-email 1.7.10.4 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org No waiting is needed for mac_ocp_{write / read}. And the bit 31 of OCPDR would not change, so rtl_udelay_loop_wait_high always return false. That is, the r8168_mac_ocp_read always retuen ~0. Signed-off-by: Hayes Wang --- drivers/net/ethernet/realtek/r8169.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index c29c5fb..1f27318 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -1043,13 +1043,6 @@ static void rtl_w1w0_phy_ocp(struct rtl8169_private *tp, int reg, int p, int m) r8168_phy_ocp_write(tp, reg, (val | p) & ~m); } -DECLARE_RTL_COND(rtl_ocpdr_cond) -{ - void __iomem *ioaddr = tp->mmio_addr; - - return RTL_R32(OCPDR) & OCPAR_FLAG; -} - static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data) { void __iomem *ioaddr = tp->mmio_addr; @@ -1058,8 +1051,6 @@ static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data) return; RTL_W32(OCPDR, OCPAR_FLAG | (reg << 15) | data); - - rtl_udelay_loop_wait_low(tp, &rtl_ocpdr_cond, 25, 10); } static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg) @@ -1071,8 +1062,7 @@ static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg) RTL_W32(OCPDR, reg << 15); - return rtl_udelay_loop_wait_high(tp, &rtl_ocpdr_cond, 25, 10) ? - RTL_R32(OCPDR) : ~0; + return RTL_R32(OCPDR); } #define OCP_STD_PHY_BASE 0xa400