Patchwork [ARM] Fix PR53859: ICE on armv7e-m

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Submitter Greta Yorsh
Date July 10, 2012, 12:20 p.m.
Message ID <000001cd5e96$68d07650$3a7162f0$@Yorsh@arm.com>
Download mbox | patch
Permalink /patch/170166/
State New
Headers show

Comments

Greta Yorsh - July 10, 2012, 12:20 p.m.
New RTL patterns generated for epilogues with RETURN (trunk r188742) are not
recognized by the pattern matching code in arm_early_load_addr_dep, which is
used for insn latency calculation when tuning for cortex-m4. It causes an
ICE when tuning for armv7e-m or cortex-m4:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53859.

The obvious fix is to detect RETURN pattern in arm_early_load_addr_dep. 

No regression on qemu.

Ok for trunk?

Thanks,
Greta

ChangeLog

2012-07-10  Greta Yorsh  <Greta.Yorsh@arm.com>

gcc/
	PR target/53859
	* config/arm/arm.c (arm_early_load_addr_dep): Handle new
	epilogue patterns.

gcc/testsuite

	PR target/53859
	* gcc.target/arm/pr53859.c: New test.

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a385e30..4a71a14 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -24038,7 +24038,12 @@  arm_early_load_addr_dep (rtx producer, rtx consumer)
   if (GET_CODE (addr) == COND_EXEC)
     addr = COND_EXEC_CODE (addr);
   if (GET_CODE (addr) == PARALLEL)
-    addr = XVECEXP (addr, 0, 0);
+    {
+      if (GET_CODE (XVECEXP (addr, 0, 0)) == RETURN)
+        addr = XVECEXP (addr, 0, 1);
+      else
+        addr = XVECEXP (addr, 0, 0);
+    }
   addr = XEXP (addr, 1);
 
   return reg_overlap_mentioned_p (value, addr);
diff --git a/gcc/testsuite/gcc.target/arm/pr53859.c b/gcc/testsuite/gcc.target/arm/pr53859.c
new file mode 100644
index 0000000..e4e9380
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr53859.c
@@ -0,0 +1,11 @@ 
+/* PR target/53859 */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-options "-mcpu=cortex-m4 -mthumb -O2" } */
+
+void bar (int,int,char* ,int);
+
+void foo (char c)
+{
+    bar (1,2,&c,3);
+}