Patchwork [2/2] powerpc/85xx: Create dts of each core in CAMP mode for P1021RDB-PC

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Submitter Xu Jiucheng
Date July 10, 2012, 8:39 a.m.
Message ID <1341909561-6591-2-git-send-email-Jiucheng.Xu@freescale.com>
Download mbox | patch
Permalink /patch/170148/
State Rejected
Delegated to: Kumar Gala
Headers show

Comments

Xu Jiucheng - July 10, 2012, 8:39 a.m.
Create the dts files for each core and splits the devices between
the two cores for P1021RDB-PC.

Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
Core1 has l2, serial1, eth2.

Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
---
 arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts |   91 +++++++++++
 arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts |  179 ++++++++++++++++++++++
 2 files changed, 270 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
 create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
Tabi Timur-B04825 - July 10, 2012, 12:25 p.m.
On Tue, Jul 10, 2012 at 3:39 AM, Xu Jiucheng <Jiucheng.Xu@freescale.com> wrote:
> Create the dts files for each core and splits the devices between
> the two cores for P1021RDB-PC.
>
> Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
> sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
> Core1 has l2, serial1, eth2.
>
> Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
> Signed-off-by: Matthew McClintock <msm@freescale.com>
> ---

Do we really want AMP device trees upstream?  They're very
application-specific, and AMP support has always been a hack.  If
anything, I think we should be deleting AMP device trees from
upstream, not adding more.
Scott Wood - July 10, 2012, 3:57 p.m.
On 07/10/2012 03:39 AM, Xu Jiucheng wrote:
> +		crypto@30000 {
> +                        status = "disabled";
> +                };

Whitespace.

> +
> +		mpic: pic@40000 {
> +			protected-sources = <
> +			16 		/* ecm, mem, L2, pci0, pci1 */
> +			43 42 59	/* i2c, serial0, spi */
> +			47 63 62 	/* gpio, tdm */
> +			20 21 22 23	/* dma */
> +			03 02 		/* mdio */
> +			29 30 34	/* enet0-queue-group0 */
> +			17 18 24	/* enet0-queue-group1 */
> +			35 36 40	/* enet1-queue-group0 */
> +			51 52 67	/* enet1-queue-group1 */
> +			28 72 45 58 	/* usb, sdhci, crypto */
> +			0xb0 0xb1 0xb2	/* message */
> +			0xb3 0xb4 0xb5
> +			0xb6 0xb7
> +			0xe0 0xe1 0xe2	/* msi */
> +			0xe3 0xe4 0xe5
> +			0xe6 0xe7		/* sdhci, crypto , pci */
> +			>;
> +			pic-no-reset;
> +		};

Besides what Timur said, do we really need protected-sources now that we
have pic-no-reset?

-Scott
Kumar Gala - July 11, 2012, 2:47 p.m.
On Jul 10, 2012, at 7:25 AM, Tabi Timur-B04825 wrote:

> On Tue, Jul 10, 2012 at 3:39 AM, Xu Jiucheng <Jiucheng.Xu@freescale.com> wrote:
>> Create the dts files for each core and splits the devices between
>> the two cores for P1021RDB-PC.
>> 
>> Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
>> sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
>> Core1 has l2, serial1, eth2.
>> 
>> Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
>> Signed-off-by: Matthew McClintock <msm@freescale.com>
>> ---
> 
> Do we really want AMP device trees upstream?  They're very
> application-specific, and AMP support has always been a hack.  If
> anything, I think we should be deleting AMP device trees from
> upstream, not adding more.

Since we already have P1021RDB-PC w/AMP support in upstream I agree we don't need another example on P1021RDB-PC.

- k
Tabi Timur-B04825 - July 11, 2012, 2:49 p.m.
Kumar Gala wrote:
> Since we already have P1021RDB-PC w/AMP support in upstream I agree we don't need another example on P1021RDB-PC.

Would you accept a patch that removes all AMP device trees from upstream?
 I just don't think that these very customer-specific dts files belong
upstream.
Kumar Gala - July 11, 2012, 2:53 p.m.
On Jul 11, 2012, at 9:49 AM, Timur Tabi wrote:

> Kumar Gala wrote:
>> Since we already have P1021RDB-PC w/AMP support in upstream I agree we don't need another example on P1021RDB-PC.
> 
> Would you accept a patch that removes all AMP device trees from upstream?
> I just don't think that these very customer-specific dts files belong
> upstream.

No, I think we should have at least one or two examples of AMP dts in upstream.

- k
Tabi Timur-B04825 - July 11, 2012, 2:56 p.m.
Schneider, Kolja wrote:
> 
> Is there any alternate source for AMP device trees? Just in case someone
> needs some sort of documentation?

The SDK.  We can put a hundred AMP device trees on there if we want, and
no one will complain.
Tabi Timur-B04825 - July 11, 2012, 2:56 p.m.
Kumar Gala wrote:
> No, I think we should have at least one or two examples of AMP dts in upstream.

We have more than that:

./p2020rdb_camp_core1.dts
./p1020rdb-pc_camp_core1.dts
./mpc8572ds_camp_core1.dts
./p2020rdb_camp_core0.dts
./p1020rdb-pc_camp_core0.dts
./mpc8572ds_camp_core0.dts
./p1020rdb_camp_core1.dts
./p1020rdb_camp_core0.dts
Kumar Gala - July 12, 2012, 3:16 a.m.
On Jul 11, 2012, at 9:56 AM, Timur Tabi wrote:

> Kumar Gala wrote:
>> No, I think we should have at least one or two examples of AMP dts in upstream.
> 
> We have more than that:
> 
> ./p2020rdb_camp_core1.dts
> ./p1020rdb-pc_camp_core1.dts
> ./mpc8572ds_camp_core1.dts
> ./p2020rdb_camp_core0.dts
> ./p1020rdb-pc_camp_core0.dts
> ./mpc8572ds_camp_core0.dts
> ./p1020rdb_camp_core1.dts
> ./p1020rdb_camp_core0.dts
> 

I'd be ok if we want to drop the p1020rdb as that board has been replaced w/the p1020rdb-pc.

- k
Tabi Timur-B04825 - July 12, 2012, 3:53 a.m.
Kumar Gala wrote:
>> >
>> >./p2020rdb_camp_core1.dts
>> >./p1020rdb-pc_camp_core1.dts
>> >./mpc8572ds_camp_core1.dts
>> >./p2020rdb_camp_core0.dts
>> >./p1020rdb-pc_camp_core0.dts
>> >./mpc8572ds_camp_core0.dts
>> >./p1020rdb_camp_core1.dts
>> >./p1020rdb_camp_core0.dts
>> >
> I'd be ok if we want to drop the p1020rdb as that board has been replaced w/the p1020rdb-pc.

How about dropping the P2020RDB as well?  Then we have only two examples: 
MPC8572DS and P1020RDB-PC.
Kumar Gala - July 12, 2012, 4:05 a.m.
On Jul 11, 2012, at 10:53 PM, Tabi Timur-B04825 wrote:

> Kumar Gala wrote:
>>>> 
>>>> ./p2020rdb_camp_core1.dts
>>>> ./p1020rdb-pc_camp_core1.dts
>>>> ./mpc8572ds_camp_core1.dts
>>>> ./p2020rdb_camp_core0.dts
>>>> ./p1020rdb-pc_camp_core0.dts
>>>> ./mpc8572ds_camp_core0.dts
>>>> ./p1020rdb_camp_core1.dts
>>>> ./p1020rdb_camp_core0.dts
>>>> 
>> I'd be ok if we want to drop the p1020rdb as that board has been replaced w/the p1020rdb-pc.
> 
> How about dropping the P2020RDB as well?  Then we have only two examples: 
> MPC8572DS and P1020RDB-PC.

I'm ok with dropping P2020RDB as well.

- k

Patch

diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
new file mode 100644
index 0000000..199e94e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
@@ -0,0 +1,91 @@ 
+/*
+ * P1021 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have memory, l2, serail0, i2c, spi, gpio,
+ * tdm, dma, usb, eth0, eth1, sdhc, crypto, global-util, message, pci0, pci1,
+ * msi.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p1021rdb-pc_32b.dts"
+
+/ {
+	model = "fsl,P1021RDB";
+	compatible = "fsl,P1021RDB-PC";
+
+	aliases {
+		ethernet1 = &enet0;
+		ethernet2 = &enet1;
+		serial0 = &serial0;
+		pci0 = &pci0;
+		pci1 = &pci1;
+	};
+
+	cpus {
+		PowerPC,P1021@1 {
+			status = "disabled";
+		};
+	};
+
+	memory {
+		device_type = "memory";
+	};
+
+	soc@ffe00000 {
+		serial1: serial@4600 {
+			status = "disabled";
+		};
+
+		mdio@24000 {
+			phy1: ethernet-phy@1 {
+				status = "disabled";
+			};
+		};
+
+		enet2: ethernet@b2000 {
+			status = "disabled";
+		};
+
+		mpic: pic@40000 {
+			protected-sources = <
+			42		/* serial1 */
+			31 32 33	/* enet2-queue-group0 */
+			25 26 27	/* enet2-queue-group1 */
+			>;
+			pic-no-reset;
+		};
+	};
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
new file mode 100644
index 0000000..dfc9105
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
@@ -0,0 +1,179 @@ 
+/*
+ * P1021 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts allows core1 to have l2, eth2, serial1, crypto.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p1021rdb-pc_32b.dts"
+
+/ {
+	model = "fsl,P1021RDB";
+	compatible = "fsl,P1021RDB-PC";
+
+	aliases {
+		ethernet0 = &enet2;
+		serial0 = &serial1;
+		};
+
+	cpus {
+		PowerPC,P1021@0 {
+			status = "disabled";
+		};
+	};
+
+	memory {
+		device_type = "memory";
+	};
+
+	localbus@ffe05000 {
+		status = "disabled";
+	};
+
+	soc@ffe00000 {
+		ecm-law@0 {
+			status = "disabled";
+		};
+
+		ecm@1000 {
+			status = "disabled";
+		};
+
+		memory-controller@2000 {
+			status = "disabled";
+		};
+
+		i2c@3000 {
+			status = "disabled";
+		};
+
+		i2c@3100 {
+			status = "disabled";
+		};
+
+		serial0: serial@4500 {
+			status = "disabled";
+		};
+
+		spi@7000 {
+			status = "disabled";
+		};
+
+		gpio: gpio-controller@f000 {
+			status = "disabled";
+		};
+
+		dma@21300 {
+			status = "disabled";
+		};
+
+		mdio@24000 {
+			phy0: ethernet-phy@0 {
+				status = "disabled";
+			};
+
+			tbi0: tbi-phy@11 {
+				status = "disabled";
+			};
+		};
+
+		mdio@25000 {
+			status = "disabled";
+		};
+
+		mdio@26000 {
+			status = "disabled";
+		};
+
+		enet0: ethernet@b0000 {
+			status = "disabled";
+		};
+
+		enet1: ethernet@b1000 {
+			status = "disabled";
+		};
+
+		usb@22000 {
+			status = "disabled";
+		};
+
+		sdhci@2e000 {
+			status = "disabled";
+		};
+
+		crypto@30000 {
+                        status = "disabled";
+                };
+
+		mpic: pic@40000 {
+			protected-sources = <
+			16 		/* ecm, mem, L2, pci0, pci1 */
+			43 42 59	/* i2c, serial0, spi */
+			47 63 62 	/* gpio, tdm */
+			20 21 22 23	/* dma */
+			03 02 		/* mdio */
+			29 30 34	/* enet0-queue-group0 */
+			17 18 24	/* enet0-queue-group1 */
+			35 36 40	/* enet1-queue-group0 */
+			51 52 67	/* enet1-queue-group1 */
+			28 72 45 58 	/* usb, sdhci, crypto */
+			0xb0 0xb1 0xb2	/* message */
+			0xb3 0xb4 0xb5
+			0xb6 0xb7
+			0xe0 0xe1 0xe2	/* msi */
+			0xe3 0xe4 0xe5
+			0xe6 0xe7		/* sdhci, crypto , pci */
+			>;
+			pic-no-reset;
+		};
+
+		msi@41600 {
+			status = "disabled";
+		};
+
+		global-utilities@e0000 {	//global utilities block
+			status = "disabled";
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		status = "disabled";
+	};
+
+	pci1: pcie@ffe0a000 {
+		status = "disabled";
+	};
+};