diff mbox

[U-Boot,2/7] HACK: rearrange link order for thumb

Message ID 20120706230438.GD29103@nvidia.com
State Deferred
Headers show

Commit Message

Allen Martin July 6, 2012, 11:04 p.m. UTC 
On Fri, Jul 06, 2012 at 01:44:32PM -0700, Stephen Warren wrote:
> On 07/06/2012 02:33 PM, Allen Martin wrote:
> > On Fri, Jul 06, 2012 at 12:09:43PM -0700, Stephen Warren wrote:
> >> On 07/06/2012 12:08 PM, Allen Martin wrote:
> >>> Rearrange the link order of libraries to avoid out of bound
> >>> relocations in thumb mode.  I have no idea how to fix this for real.
> >>
> >> Are the relocations branches or something else? It looks like
> >> unconditional jump range is +/-4MB for Thumb1 and +/-16MB for Thumb2, so
> >> I'm surprised we'd be exceeding that, considering the U-boot binary is
> >> on the order of 256KB on Tegra right now.
> > 
> > 
> > This is the relcation type:
> > 
> > arch/arm/lib/libarm.o: In function `__flush_dcache_all':
> > /home/arm/u-boot/arch/arm/lib/cache.c:52: relocation truncated to fit: R_ARM_THM_JUMP11 against symbol `flush_cache' defined in .text section in arch/arm/cpu/armv7/libarmv7.o
> > 
> > The instruction is a "b.n" not a "b", which is what is causing the problem.
> > 
> > I think because of the weak alias the compiler used a short jump to
> > the local function, but when it got linked it resolved to a function
> > that was too far away for the short jump:
> > 
> > 
> > void  flush_cache(unsigned long start, unsigned long size)
> >         __attribute__((weak, alias("__flush_cache")));
> > 
> > 00000002 <__flush_dcache_all>:
> >    2:   2000            movs    r0, #0
> >    4:   f04f 31ff       mov.w   r1, #4294967295 ; 0xffffffff
> >    8:   e7fe            b.n     0 <__flush_cache>
> 
> Ah, that explanation makes sense.
> 
> > It looks like there's a "-fno-optimize-sibling-calls" option to gcc to
> > avoid this problem.  Seems a shame to disable all short jumps for this
> > one case though.
> 
> It seems like a bug that the b-vs-b.n optimization is applied to a weak
> symbol, since the compiler can't possibly know the range of the jump.
> 
> Also, I've seen ld for some architectures rewrite the equivalent of b.n
> to plain b when needing to expand the branch target range; IIRC a
> process known as "relaxing"? Perhaps gcc is expecting ld to do that, but
> ld isn't?

I verified the "-fno-optimize-sibling-calls" compiler option works
around this.  So here's the improved patch:


Author: Allen Martin <amartin@nvidia.com>
Date:   Fri Jul 6 15:58:24 2012 -0700

    tegra20: disable local branch optimization

    This works around a bug when compiling in thumb mode when branching to
    a weak aliased function.  The compiler will optimize the branch to a
    short branch (b.n instruction) but the linker may resolve the target
    to a function that is too far away for a short branch.

    Signed-off-by: Allen Martin <amartin@nvidia.com>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/tegra20/config.mk
b/arch/arm/cpu/armv7/tegra20/config.mk
index 6432e75..56bb830 100644
--- a/arch/arm/cpu/armv7/tegra20/config.mk
+++ b/arch/arm/cpu/armv7/tegra20/config.mk
@@ -24,3 +24,8 @@ 
 # MA 02111-1307 USA
 #
 CONFIG_ARCH_DEVICE_TREE := tegra20
+
+# this works around a bug when compiling thumb where some branches
+# are incorrectly optimized to short branches when they shouldn't
+# be
+PLATFORM_RELFLAGS += -fno-optimize-sibling-calls