From patchwork Tue Jul 3 01:39:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 168594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7F8A82C009C for ; Mon, 2 Jul 2012 23:43:32 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SlgsW-0002iw-3O; Mon, 02 Jul 2012 13:41:24 +0000 Received: from mail-gg0-f177.google.com ([209.85.161.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Slgr7-0002gO-Mx; Mon, 02 Jul 2012 13:39:59 +0000 Received: by ggcs5 with SMTP id s5so4367587ggc.36 for ; Mon, 02 Jul 2012 06:39:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=q6gQFSQ8FXPkb33NSgQQQXYiZ8Iu0B7aOHltKx37rgE=; b=k4rPD2axI/vYzuZc26L9wm628vSkvm2tSffdFi0KltErsjKQ7s1OzMNZ8L7Gi6HZWm l2rkRbUm/rlNw9FP4N8pWMFdkpTTjzGFFAFajiI4+JJ0bg3XksyrncFQIbz0mziG4NAF Yi8v5kUSWm7X9GFRs2kCWBHVRIJ3e2dJrfO7kaNMrmcg0xq/hsqf79Yn//t8jmedSwcy S4YBQcWw56nYbbN1b0atpW93RPMg73VQvSslKAWhigM3B00NmhP9IIm7ocGd7wy9I2dT nhuH96S/o2vtl9UDCawedHNByyzKEnj2JAcwnKMtP9LNUTdzkmhrtGZ2jqr+euA13XCa yu7g== Received: by 10.66.86.73 with SMTP id n9mr21731713paz.24.1341236395062; Mon, 02 Jul 2012 06:39:55 -0700 (PDT) Received: from localhost.localdomain.Home ([218.81.180.228]) by mx.google.com with ESMTPS id ka5sm13030126pbb.37.2012.07.02.06.39.49 (version=SSLv3 cipher=OTHER); Mon, 02 Jul 2012 06:39:54 -0700 (PDT) From: Huang Shijie To: shawn.guo@linaro.org Subject: [PATCH v4 1/2] ARM: imx6q: add clocks for gpmi-nand Date: Mon, 2 Jul 2012 21:39:31 -0400 Message-Id: <1341279572-6098-2-git-send-email-shijie8@gmail.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1341279572-6098-1-git-send-email-shijie8@gmail.com> References: <1341279572-6098-1-git-send-email-shijie8@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -0.5 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-0.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.161.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shijie8[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 1.9 DATE_IN_FUTURE_06_12 Date: is 6 to 12 hours after Received: date 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (shijie8[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Huang Shijie , dong.aisheng@linaro.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dedekind1@gmail.com X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add clocks for gpmi-nand. Signed-off-by: Huang Shijie Acked-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 12d9040..b28f68a 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -151,7 +151,7 @@ enum mx6q_clks { esai, gpt_ipg, gpt_ipg_per, gpu2d_core, gpu3d_core, hdmi_iahb, hdmi_isfr, i2c1, i2c2, i2c3, iim, enfc, ipu1, ipu1_di0, ipu1_di1, ipu2, ipu2_di0, ldb_di0, ldb_di1, ipu2_di1, hsi_tx, mlb, mmdc_ch0_axi, - mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4, + mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4, per1_bch, gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1, ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, @@ -357,6 +357,7 @@ int __init mx6q_clocks_init(void) clk[ocram] = imx_clk_gate2("ocram", "ahb", base + 0x74, 28); clk[openvg_axi] = imx_clk_gate2("openvg_axi", "axi", base + 0x74, 30); clk[pcie_axi] = imx_clk_gate2("pcie_axi", "pcie_axi_sel", base + 0x78, 0); + clk[per1_bch] = imx_clk_gate2("per1_bch", "usdhc3", base + 0x78, 12); clk[pwm1] = imx_clk_gate2("pwm1", "ipg_per", base + 0x78, 16); clk[pwm2] = imx_clk_gate2("pwm2", "ipg_per", base + 0x78, 18); clk[pwm3] = imx_clk_gate2("pwm3", "ipg_per", base + 0x78, 20); @@ -394,6 +395,11 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[twd], NULL, "smp_twd"); clk_register_clkdev(clk[usboh3], NULL, "usboh3"); clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh"); + clk_register_clkdev(clk[per1_bch], "per1_bch", "112000.gpmi-nand"); + clk_register_clkdev(clk[gpmi_bch_apb], "gpmi_bch_apb", "112000.gpmi-nand"); + clk_register_clkdev(clk[gpmi_bch], "gpmi_bch", "112000.gpmi-nand"); + clk_register_clkdev(clk[gpmi_apb], "gpmi_apb", "112000.gpmi-nand"); + clk_register_clkdev(clk[gpmi_io], "gpmi_io", "112000.gpmi-nand"); clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");