From patchwork Mon Jul 2 11:08:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Jinsong" X-Patchwork-Id: 168552 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A60A72C00A0 for ; Mon, 2 Jul 2012 21:09:22 +1000 (EST) Received: from localhost ([::1]:55463 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SleVM-0004Uc-DJ for incoming@patchwork.ozlabs.org; Mon, 02 Jul 2012 07:09:20 -0400 Received: from eggs.gnu.org ([208.118.235.92]:34876) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SleVA-0004MW-1Z for qemu-devel@nongnu.org; Mon, 02 Jul 2012 07:09:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SleV7-0003NQ-O1 for qemu-devel@nongnu.org; Mon, 02 Jul 2012 07:09:07 -0400 Received: from mga11.intel.com ([192.55.52.93]:20473) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SleV7-0003Ki-BD for qemu-devel@nongnu.org; Mon, 02 Jul 2012 07:09:05 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 02 Jul 2012 04:08:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="scan'208,223";a="172471027" Received: from fmsmsx108.amr.corp.intel.com ([10.19.9.228]) by fmsmga001.fm.intel.com with ESMTP; 02 Jul 2012 04:08:16 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.19.9.29) by FMSMSX108.amr.corp.intel.com (10.19.9.228) with Microsoft SMTP Server (TLS) id 14.1.355.2; Mon, 2 Jul 2012 04:08:16 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx110.amr.corp.intel.com (10.19.9.29) with Microsoft SMTP Server (TLS) id 14.1.355.2; Mon, 2 Jul 2012 04:08:16 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.220]) by SHSMSX102.ccr.corp.intel.com ([169.254.2.33]) with mapi id 14.01.0355.002; Mon, 2 Jul 2012 19:08:14 +0800 From: "Liu, Jinsong" To: Eduardo Habkost , Jan Kiszka , =?iso-8859-1?Q?Andreas_F=E4rber?= Thread-Topic: [RFC PATCH] Expose tsc deadline timer feature to guest Thread-Index: Ac1YQvksUlyO2T2DQjGFJhbR3FlRBQ== Date: Mon, 2 Jul 2012 11:08:14 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Cc: Marcelo Tosatti , Avi Kivity , kvm , "qemu-devel@nongnu.org" Subject: [Qemu-devel] [RFC PATCH] Expose tsc deadline timer feature to guest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Eduardo, Jan, Andreas As we sync 3 months ago, I wait until qemu1.1 done, then re-write patch based on qemu1.1. Now it's time to re-write my patch based on qemu1.1. Attached is a RFC patch for exposing tsc deadline timer to guest. I have checked current qemu1.1 code, and read some emails regarding to cpuid exposing these days. However, I think I may ignore something (so many discussion :-), so if you think anything wrong, please point out to me. Thanks, Jinsong Reviewed-by: Eduardo Habkost Acked-by: Jan Kiszka ==================== From 8b5b003f6f8834d2d5d71e18bb47b7f089bc4928 Mon Sep 17 00:00:00 2001 From: Liu, Jinsong Date: Tue, 3 Jul 2012 02:35:10 +0800 Subject: [PATCH] Expose tsc deadline timer feature to guest This patch exposes tsc deadline timer feature to guest if 1). in-kernel irqchip is used, and 2). kvm has emulated tsc deadline timer, and 3). user authorize the feature exposing via -cpu or +/- tsc-deadline Signed-off-by: Liu, Jinsong --- target-i386/cpu.h | 1 + target-i386/kvm.c | 5 +++++ 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 79cc640..d1a4a04 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -400,6 +400,7 @@ #define CPUID_EXT_X2APIC (1 << 21) #define CPUID_EXT_MOVBE (1 << 22) #define CPUID_EXT_POPCNT (1 << 23) +#define CPUID_EXT_TSC_DEADLINE_TIMER (1 << 24) #define CPUID_EXT_XSAVE (1 << 26) #define CPUID_EXT_OSXSAVE (1 << 27) #define CPUID_EXT_HYPERVISOR (1 << 31) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 0d0d8f6..52b577f 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -361,8 +361,13 @@ int kvm_arch_init_vcpu(CPUX86State *env) env->cpuid_features &= kvm_arch_get_supported_cpuid(s, 1, 0, R_EDX); i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR; + j = env->cpuid_ext_features & CPUID_EXT_TSC_DEADLINE_TIMER; env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(s, 1, 0, R_ECX); env->cpuid_ext_features |= i; + if (j && kvm_irqchip_in_kernel() && + kvm_check_extension(s, KVM_CAP_TSC_DEADLINE_TIMER)) { + env->cpuid_ext_features |= CPUID_EXT_TSC_DEADLINE_TIMER; + } env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(s, 0x80000001, 0, R_EDX);