Patchwork target-i386: fix build with -Werror

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Submitter dunrong huang
Date June 29, 2012, 6:41 a.m.
Message ID <1340952088-7192-1-git-send-email-riegamaths@gmail.com>
Download mbox | patch
Permalink /patch/167991/
State New
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dunrong huang - June 29, 2012, 6:41 a.m.
Commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table type
safety but raises compile error of incompatible pointer type.
Fix it by casting to correct function type

Signed-off-by: Dunrong Huang <riegamaths@gmail.com>
---
 target-i386/translate.c |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)
Andreas Färber - June 29, 2012, 3:24 p.m.
Am 29.06.2012 08:41, schrieb Dunrong Huang:
> Commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table type
> safety but raises compile error of incompatible pointer type.

What's the difference between the signatures?

Regards,
Andreas

> Fix it by casting to correct function type
> 
> Signed-off-by: Dunrong Huang <riegamaths@gmail.com>
> ---
>  target-i386/translate.c |   22 +++++++++++-----------
>  1 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index a902f4a..81928b5 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -2950,20 +2950,20 @@ static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = {
>  static const SSEFunc_0_pi sse_op_table3a[4] = {
>      gen_helper_cvtsi2ss,
>      gen_helper_cvtsi2sd,
> -    X86_64_ONLY(gen_helper_cvtsq2ss),
> -    X86_64_ONLY(gen_helper_cvtsq2sd),
> +    X86_64_ONLY((SSEFunc_0_pi)gen_helper_cvtsq2ss),
> +    X86_64_ONLY((SSEFunc_0_pi)gen_helper_cvtsq2sd),
>  };
>  
>  static const SSEFunc_i_p sse_op_table3b[4 * 2] = {
>      gen_helper_cvttss2si,
>      gen_helper_cvttsd2si,
> -    X86_64_ONLY(gen_helper_cvttss2sq),
> -    X86_64_ONLY(gen_helper_cvttsd2sq),
> +    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvttss2sq),
> +    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvttsd2sq),
>  
>      gen_helper_cvtss2si,
>      gen_helper_cvtsd2si,
> -    X86_64_ONLY(gen_helper_cvtss2sq),
> -    X86_64_ONLY(gen_helper_cvtsd2sq),
> +    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvtss2sq),
> +    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvtsd2sq),
>  };
>  
>  static const SSEFunc_0_pp sse_op_table4[8][4] = {
> @@ -3568,8 +3568,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
>                  tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
>                  sse_fn_pi(cpu_ptr0, cpu_tmp2_i32);
>              } else {
> -                sse_fn_pl = sse_op_table3a[(s->dflag == 2) * 2 +
> -                                           ((b >> 8) - 2)];
> +                sse_fn_pl = (SSEFunc_0_pl)sse_op_table3a[(s->dflag == 2) * 2 +
> +                                                         ((b >> 8) - 2)];
>                  sse_fn_pl(cpu_ptr0, cpu_T[0]);
>              }
>              break;
> @@ -3630,9 +3630,9 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
>                  sse_fn_i_p(cpu_tmp2_i32, cpu_ptr0);
>                  tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
>              } else {
> -                sse_fn_l_p = sse_op_table3b[(s->dflag == 2) * 2 +
> -                                            ((b >> 8) - 2) +
> -                                            (b & 1) * 4];
> +                sse_fn_l_p = (SSEFunc_l_p)sse_op_table3b[(s->dflag == 2) * 2 +
> +                                                         ((b >> 8) - 2) +
> +                                                         (b & 1) * 4];
>                  sse_fn_l_p(cpu_T[0], cpu_ptr0);
>              }
>              gen_op_mov_reg_T0(ot, reg);
dunrong huang - June 29, 2012, 5:50 p.m.
2012/6/29 Andreas Färber <afaerber@suse.de>:
> Am 29.06.2012 08:41, schrieb Dunrong Huang:
>> Commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table type
>> safety but raises compile error of incompatible pointer type.
>
> What's the difference between the signatures?
>
The SSEFunc_0_pi is declared as:
typedef void (*SSEFunc_0_pi)(TCGv_ptr reg, TCGv_i32 val);

gen_helper_cvtsi2ss is defined as(By preprocessed source code(GCC -E):
static inline void gen_helper_cvtsi2ss( TCGv_ptr arg1, TCGv_i32 arg2)

And gen_helper_cvtsq2ss is defined as(By preprocessed source code(GCC -E):
static inline void gen_helper_cvtsq2ss( TCGv_ptr arg1, TCGv_i64 arg2)

So the type of gen_helper_cvtsq2ss is not SSEFunc_0_pi.

But from tcg/tcg.h,
typedef struct
{
    int i32;
} TCGv_i32;

typedef struct
{
    int i64;
} TCGv_i64;

We know that TCGv_i32 and TCGv_i64 have same members, their contents is same.
So casting gen_helper_cvtsq2ss as SSEFunc_0_pi will work.

And similarly for the others.
Stefan Weil - June 29, 2012, 7:35 p.m.
Am 29.06.2012 08:41, schrieb Dunrong Huang:
> Commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table 
> type safety but raises compile error of incompatible pointer type. Fix 
> it by casting to correct function type Signed-off-by: Dunrong Huang 
> <riegamaths@gmail.com> --- target-i386/translate.c | 22 
> +++++++++++----------- 1 files changed, 11 insertions(+), 11 deletions(-) 

Adding type casts fixes the compilation, but also removes the
type safety again. I'll send a patch which works without type
casts in about 1/2 an hour.

Regards,

Stefan W.
Blue Swirl - June 29, 2012, 8:36 p.m.
On Fri, Jun 29, 2012 at 7:35 PM, Stefan Weil <sw@weilnetz.de> wrote:
> Am 29.06.2012 08:41, schrieb Dunrong Huang:
>>
>> Commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table type
>> safety but raises compile error of incompatible pointer type. Fix it by
>> casting to correct function type Signed-off-by: Dunrong Huang
>> <riegamaths@gmail.com> --- target-i386/translate.c | 22
>> +++++++++++----------- 1 files changed, 11 insertions(+), 11 deletions(-)
>
>
> Adding type casts fixes the compilation, but also removes the
> type safety again. I'll send a patch which works without type
> casts in about 1/2 an hour.

The SSE tables with mixed function signatures should be replaced with
for example switch(). That would avoid all casts.

>
> Regards,
>
> Stefan W.
>

Patch

diff --git a/target-i386/translate.c b/target-i386/translate.c
index a902f4a..81928b5 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -2950,20 +2950,20 @@  static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = {
 static const SSEFunc_0_pi sse_op_table3a[4] = {
     gen_helper_cvtsi2ss,
     gen_helper_cvtsi2sd,
-    X86_64_ONLY(gen_helper_cvtsq2ss),
-    X86_64_ONLY(gen_helper_cvtsq2sd),
+    X86_64_ONLY((SSEFunc_0_pi)gen_helper_cvtsq2ss),
+    X86_64_ONLY((SSEFunc_0_pi)gen_helper_cvtsq2sd),
 };
 
 static const SSEFunc_i_p sse_op_table3b[4 * 2] = {
     gen_helper_cvttss2si,
     gen_helper_cvttsd2si,
-    X86_64_ONLY(gen_helper_cvttss2sq),
-    X86_64_ONLY(gen_helper_cvttsd2sq),
+    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvttss2sq),
+    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvttsd2sq),
 
     gen_helper_cvtss2si,
     gen_helper_cvtsd2si,
-    X86_64_ONLY(gen_helper_cvtss2sq),
-    X86_64_ONLY(gen_helper_cvtsd2sq),
+    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvtss2sq),
+    X86_64_ONLY((SSEFunc_i_p)gen_helper_cvtsd2sq),
 };
 
 static const SSEFunc_0_pp sse_op_table4[8][4] = {
@@ -3568,8 +3568,8 @@  static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
                 sse_fn_pi(cpu_ptr0, cpu_tmp2_i32);
             } else {
-                sse_fn_pl = sse_op_table3a[(s->dflag == 2) * 2 +
-                                           ((b >> 8) - 2)];
+                sse_fn_pl = (SSEFunc_0_pl)sse_op_table3a[(s->dflag == 2) * 2 +
+                                                         ((b >> 8) - 2)];
                 sse_fn_pl(cpu_ptr0, cpu_T[0]);
             }
             break;
@@ -3630,9 +3630,9 @@  static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
                 sse_fn_i_p(cpu_tmp2_i32, cpu_ptr0);
                 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
             } else {
-                sse_fn_l_p = sse_op_table3b[(s->dflag == 2) * 2 +
-                                            ((b >> 8) - 2) +
-                                            (b & 1) * 4];
+                sse_fn_l_p = (SSEFunc_l_p)sse_op_table3b[(s->dflag == 2) * 2 +
+                                                         ((b >> 8) - 2) +
+                                                         (b & 1) * 4];
                 sse_fn_l_p(cpu_T[0], cpu_ptr0);
             }
             gen_op_mov_reg_T0(ot, reg);