From patchwork Thu Jun 28 07:07:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 167801 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A057F100827 for ; Thu, 28 Jun 2012 17:11:26 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sk8pN-00008C-0s; Thu, 28 Jun 2012 07:07:45 +0000 Received: from ch1ehsobe005.messaging.microsoft.com ([216.32.181.185] helo=ch1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Sk8pK-00007U-Ig for linux-arm-kernel@lists.infradead.org; Thu, 28 Jun 2012 07:07:43 +0000 Received: from mail219-ch1-R.bigfish.com (10.43.68.239) by CH1EHSOBE009.bigfish.com (10.43.70.59) with Microsoft SMTP Server id 14.1.225.23; Thu, 28 Jun 2012 07:05:55 +0000 Received: from mail219-ch1 (localhost [127.0.0.1]) by mail219-ch1-R.bigfish.com (Postfix) with ESMTP id 3E4DA360107; Thu, 28 Jun 2012 07:05:55 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzc89bhzz1202hzz8275bh8275dhz2dh87h2a8h668h839h93fhd24he5bhe96hf0ah) X-FB-DOMAIN-IP-MATCH: fail Received: from mail219-ch1 (localhost.localdomain [127.0.0.1]) by mail219-ch1 (MessageSwitch) id 1340867153154595_27083; Thu, 28 Jun 2012 07:05:53 +0000 (UTC) Received: from CH1EHSMHS030.bigfish.com (snatpool2.int.messaging.microsoft.com [10.43.68.236]) by mail219-ch1.bigfish.com (Postfix) with ESMTP id 21E7B220048; Thu, 28 Jun 2012 07:05:53 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS030.bigfish.com (10.43.70.30) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 28 Jun 2012 07:05:52 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.298.5; Thu, 28 Jun 2012 02:07:37 -0500 Received: from S2101-09.ap.freescale.net ([10.192.185.193]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q5S77THp006996; Thu, 28 Jun 2012 00:07:31 -0700 From: Shawn Guo To: Subject: [PATCH] ARM: fiq: change FIQ_START to a variable Date: Thu, 28 Jun 2012 15:07:44 +0800 Message-ID: <1340867264-23043-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.185 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kukjin Kim , Sascha Hauer , Shawn Guo , Russell King , Rob Herring X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The commit a2be01b (ARM: only include mach/irqs.h for !SPARSE_IRQ) makes mach/irqs.h only be included for !SPARSE_IRQ build. There are a nubmer of platforms have FIQ_START defined in mach/irqs.h for FIQ support. arch/arm/mach-rpc/include/mach/irqs.h:#define FIQ_START 64 arch/arm/mach-s3c24xx/include/mach/irqs.h:#define FIQ_START IRQ_EINT0 arch/arm/plat-mxc/include/mach/irqs.h:#define FIQ_START 0 If SPARSE_IRQ is enabled for any of these platforms, the following compile error will be seen. arch/arm/kernel/fiq.c: In function ‘enable_fiq’: arch/arm/kernel/fiq.c:127:19: error: ‘FIQ_START’ undeclared (first use in this function) arch/arm/kernel/fiq.c:127:19: note: each undeclared identifier is reported only once for each function it appears in arch/arm/kernel/fiq.c: In function ‘disable_fiq’: arch/arm/kernel/fiq.c:132:20: error: ‘FIQ_START’ undeclared (first use in this function) The patch changes fiq code to have init_FIQ take FIQ_START from platforms as a parameter and assign it to variable fiq_start which is to replace FIQ_START uses in enable_fiq/disable_fiq. Signed-off-by: Shawn Guo Cc: Russell King Cc: Kukjin Kim Cc: Sascha Hauer Cc: Rob Herring Acked-by: Russell King --- arch/arm/include/asm/mach/irq.h | 2 +- arch/arm/kernel/fiq.c | 9 ++++++--- arch/arm/mach-rpc/irq.c | 2 +- arch/arm/plat-mxc/avic.c | 2 +- arch/arm/plat-mxc/tzic.c | 2 +- arch/arm/plat-s3c24xx/irq.c | 2 +- 6 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h index febe495..15cb035 100644 --- a/arch/arm/include/asm/mach/irq.h +++ b/arch/arm/include/asm/mach/irq.h @@ -17,7 +17,7 @@ struct seq_file; /* * This is internal. Do not use it. */ -extern void init_FIQ(void); +extern void init_FIQ(int); extern int show_fiq_list(struct seq_file *, int); #ifdef CONFIG_MULTI_IRQ_HANDLER diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index c32f845..2adda11 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -122,14 +122,16 @@ void release_fiq(struct fiq_handler *f) while (current_fiq->fiq_op(current_fiq->dev_id, 0)); } +static int fiq_start; + void enable_fiq(int fiq) { - enable_irq(fiq + FIQ_START); + enable_irq(fiq + fiq_start); } void disable_fiq(int fiq) { - disable_irq(fiq + FIQ_START); + disable_irq(fiq + fiq_start); } EXPORT_SYMBOL(set_fiq_handler); @@ -140,7 +142,8 @@ EXPORT_SYMBOL(release_fiq); EXPORT_SYMBOL(enable_fiq); EXPORT_SYMBOL(disable_fiq); -void __init init_FIQ(void) +void __init init_FIQ(int start) { no_fiq_insn = *(unsigned long *)0xffff001c; + fiq_start = start; } diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index cf0e669..3e4fa84 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -163,6 +163,6 @@ void __init rpc_init_irq(void) } } - init_FIQ(); + init_FIQ(FIQ_START); } diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index e612cc1..f3d671f 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -217,7 +217,7 @@ void __init mxc_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(); + init_FIQ(FIQ_START); #endif printk(KERN_INFO "MXC IRQ initialized\n"); diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index abc90e4..c60a7e4 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -192,7 +192,7 @@ void __init tzic_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(); + init_FIQ(FIQ_START); #endif pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index bc42c04..fe57bbb 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -533,7 +533,7 @@ void __init s3c24xx_init_irq(void) int i; #ifdef CONFIG_FIQ - init_FIQ(); + init_FIQ(FIQ_START); #endif irqdbf("s3c2410_init_irq: clearing interrupt status flags\n");