Patchwork [v7] MTD: LPC32xx SLC NAND driver

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Submitter Artem Bityutskiy
Date June 27, 2012, 10:46 a.m.
Message ID <1340794007.29342.50.camel@sauron.fi.intel.com>
Download mbox | patch
Permalink /patch/167609/
State New
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Comments

Artem Bityutskiy - June 27, 2012, 10:46 a.m.
On Thu, 2012-06-07 at 12:22 +0200, Roland Stigge wrote:
> This patch adds support for the SLC NAND controller inside the LPC32xx SoC.
> 
> Signed-off-by: Roland Stigge <stigge@antcom.de>

Now the write_page and write_page_raw functions return an error code,
see this commit in the l2 tree:

http://git.infradead.org/users/dedekind/l2-mtd.git/commit/49c8d9ab3b70732665249f2d993f734378ebbba9

I've amended your SLC driver, see below the diff. But I think it could
return the real return code becuse it can fail - could you please take a
look and send an incremental patch?

Please, base your work on top of the l2-mtd tree:
git://git.infradead.org/users/dedekind/l2-mtd.git

Thanks!
stigge@antcom.de - June 27, 2012, 12:14 p.m.
On 06/27/2012 12:46 PM, Artem Bityutskiy wrote:
> On Thu, 2012-06-07 at 12:22 +0200, Roland Stigge wrote:
>> This patch adds support for the SLC NAND controller inside the
>> LPC32xx SoC.
>> 
>> Signed-off-by: Roland Stigge <stigge@antcom.de>
> 
> Now the write_page and write_page_raw functions return an error
> code, see this commit in the l2 tree:
> 
> http://git.infradead.org/users/dedekind/l2-mtd.git/commit/49c8d9ab3b70732665249f2d993f734378ebbba9
>
>  I've amended your SLC driver, see below the diff. But I think it
> could return the real return code becuse it can fail - could you
> please take a look and send an incremental patch?
> 
> Please, base your work on top of the l2-mtd tree: 
> git://git.infradead.org/users/dedekind/l2-mtd.git

Thanks for the note! I'm sending an incremental patch. There was
actually only one place in the two functions that could fail (return
code of lpc32xx_xfer()).

Roland
Alexandre Pereira da Silva - June 27, 2012, 12:26 p.m.
On Wed, Jun 27, 2012 at 9:14 AM, Roland Stigge <stigge@antcom.de> wrote:
> On 06/27/2012 12:46 PM, Artem Bityutskiy wrote:
>> On Thu, 2012-06-07 at 12:22 +0200, Roland Stigge wrote:
>>> This patch adds support for the SLC NAND controller inside the
>>> LPC32xx SoC.
>>>
>>> Signed-off-by: Roland Stigge <stigge@antcom.de>
>>
>> Now the write_page and write_page_raw functions return an error
>> code, see this commit in the l2 tree:
>>
>> http://git.infradead.org/users/dedekind/l2-mtd.git/commit/49c8d9ab3b70732665249f2d993f734378ebbba9
>>
>>  I've amended your SLC driver, see below the diff. But I think it
>> could return the real return code becuse it can fail - could you
>> please take a look and send an incremental patch?
>>
>> Please, base your work on top of the l2-mtd tree:
>> git://git.infradead.org/users/dedekind/l2-mtd.git
>
> Thanks for the note! I'm sending an incremental patch. There was
> actually only one place in the two functions that could fail (return
> code of lpc32xx_xfer()).

I think it's best in case of *_raw to use nand base default functions,
like in the MLC patch.
Artem Bityutskiy - June 27, 2012, 12:33 p.m.
On Wed, 2012-06-27 at 14:14 +0200, Roland Stigge wrote:
> Thanks for the note! I'm sending an incremental patch. There was
> actually only one place in the two functions that could fail (return
> code of lpc32xx_xfer()).

Could you please check the MCL patch as well and re-send it against the
l2 tree?

I've squashed your change into the driver and pushed out, thanks!
stigge@antcom.de - June 27, 2012, 3:25 p.m.
Hi!

On 06/27/2012 02:26 PM, Alexandre Pereira da Silva wrote:
> I think it's best in case of *_raw to use nand base default functions,
> like in the MLC patch.

Problem here (specific for this SLC controller) is that it expects us to
access the data register via 16bit access while the actual data is only
8bit wide.

This can't be done with the default nand functions, neither with the
8bit nor 16bit variant.

Roland

PS: Nevertheless, I will post our SLC driver update series against the
l2-mtd branch.
stigge@antcom.de - June 27, 2012, 3:26 p.m.
On 06/27/2012 02:33 PM, Artem Bityutskiy wrote:
> On Wed, 2012-06-27 at 14:14 +0200, Roland Stigge wrote:
>> Thanks for the note! I'm sending an incremental patch. There was 
>> actually only one place in the two functions that could fail
>> (return code of lpc32xx_xfer()).
> 
> Could you please check the MCL patch as well and re-send it against
> the l2 tree?
> 
> I've squashed your change into the driver and pushed out, thanks!

Yes, thanks!

Will post an updated MLC against l2-mtd later today.

Roland

Patch

diff --git a/drivers/mtd/nand/lpc32xx_slc.c b/drivers/mtd/nand/lpc32xx_slc.c
index 796e37b..7e2e78d 100644
--- a/drivers/mtd/nand/lpc32xx_slc.c
+++ b/drivers/mtd/nand/lpc32xx_slc.c
@@ -673,9 +673,9 @@  static int lpc32xx_nand_read_page_raw_syndrome(struct mtd_info *mtd,
  * Write the data and OOB data to the device, use ECC with the data,
  * disable ECC for the OOB data
  */
-static void lpc32xx_nand_write_page_syndrome(struct mtd_info *mtd,
-                                            struct nand_chip *chip,
-                                            const u8 *buf, int oob_required)
+static int lpc32xx_nand_write_page_syndrome(struct mtd_info *mtd,
+                                           struct nand_chip *chip,
+                                           const u8 *buf, int oob_required)
 {
        struct lpc32xx_nand_host *host = chip->priv;
        u8 *pb = chip->oob_poi + chip->ecc.layout->eccpos[0];
@@ -691,20 +691,22 @@  static void lpc32xx_nand_write_page_syndrome(struct mtd_info *mtd,
 
        /* Write ECC data to device */
        chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+       return 0;
 }
 
 /*
  * Write the data and OOB data to the device, no ECC correction with the
  * data or OOB data
  */
-static void lpc32xx_nand_write_page_raw_syndrome(struct mtd_info *mtd,
-                                                struct nand_chip *chip,
-                                                const u8 *buf,
-                                                int oob_required)
+static int lpc32xx_nand_write_page_raw_syndrome(struct mtd_info *mtd,
+                                               struct nand_chip *chip,
+                                               const u8 *buf,
+                                               int oob_required)
 {
        /* Raw writes can just use the FIFO interface */
        chip->write_buf(mtd, buf, chip->ecc.size * chip->ecc.steps);
        chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+       return 0;
 }
 
 static bool lpc32xx_dma_filter(struct dma_chan *chan, void *param)