From patchwork Mon Jun 25 23:33:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Neuling X-Patchwork-Id: 167271 X-Patchwork-Delegate: benh@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id BD109100A2F for ; Tue, 26 Jun 2012 09:42:29 +1000 (EST) Received: by ozlabs.org (Postfix) id 177AF1007DF; Tue, 26 Jun 2012 09:33:13 +1000 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from localhost.localdomain (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id DE3D7B6FF7; Tue, 26 Jun 2012 09:33:12 +1000 (EST) Received: by localhost.localdomain (Postfix, from userid 1000) id 7E8E4D43683; Tue, 26 Jun 2012 09:33:12 +1000 (EST) To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman From: Michael Neuling Date: Tue, 26 Jun 2012 09:33:12 +1000 Subject: [PATCH 5/18] powerpc: convert to %r for all GPR usage In-Reply-To: <1340667187.357853.615199632713.qpush@ale> Message-Id: <20120625233312.7E8E4D43683@localhost.localdomain> Cc: mikey@neuling.org, matt@ozlabs.org, linuxppc-dev@ozlabs.org, schwab@linux-m68k.org, Anton Blanchard , Olof Johannsson X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15rc1 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Now all the fixes are in place, let's rock-n-roll! Signed-off-by: Michael Neuling --- arch/powerpc/include/asm/ppc_asm.h | 72 ++++++++++++++++++++----------------- 1 file changed, 39 insertions(+), 33 deletions(-) Index: b/arch/powerpc/include/asm/ppc_asm.h =================================================================== --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -490,40 +490,46 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) #define cr7 7 -/* General Purpose Registers (GPRs) */ +/* + * General Purpose Registers (GPRs) + * + * The lower case r0-r31 should be used in preference to the upper + * case R0-R31 as they provide more error checking in the assembler. + * Use R0-31 only when really nessesary. + */ -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 +#define r0 %r0 +#define r1 %r1 +#define r2 %r2 +#define r3 %r3 +#define r4 %r4 +#define r5 %r5 +#define r6 %r6 +#define r7 %r7 +#define r8 %r8 +#define r9 %r9 +#define r10 %r10 +#define r11 %r11 +#define r12 %r12 +#define r13 %r13 +#define r14 %r14 +#define r15 %r15 +#define r16 %r16 +#define r17 %r17 +#define r18 %r18 +#define r19 %r19 +#define r20 %r20 +#define r21 %r21 +#define r22 %r22 +#define r23 %r23 +#define r24 %r24 +#define r25 %r25 +#define r26 %r26 +#define r27 %r27 +#define r28 %r28 +#define r29 %r29 +#define r30 %r30 +#define r31 %r31 /* Floating Point Registers (FPRs) */