From patchwork Thu Jun 21 09:36:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 166283 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A6ADAB6FB9 for ; Thu, 21 Jun 2012 19:49:07 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754688Ab2FUJtG (ORCPT ); Thu, 21 Jun 2012 05:49:06 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:22625 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759209Ab2FUJtG (ORCPT ); Thu, 21 Jun 2012 05:49:06 -0400 Received: from 172.24.2.119 (EHLO szxeml214-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.1.9-GA FastPath queued) with ESMTP id AKS68845; Thu, 21 Jun 2012 17:39:21 +0800 (CST) Received: from SZXEML417-HUB.china.huawei.com (10.82.67.156) by szxeml214-edg.china.huawei.com (172.24.2.29) with Microsoft SMTP Server (TLS) id 14.1.323.3; Thu, 21 Jun 2012 17:37:41 +0800 Received: from localhost (10.108.108.229) by szxeml417-hub.china.huawei.com (10.82.67.156) with Microsoft SMTP Server id 14.1.323.3; Thu, 21 Jun 2012 17:37:15 +0800 From: Jiang Liu To: Bjorn Helgaas , Yinghai Lu , Taku Izumi , Kenji Kaneshige , Don Dutile CC: Jiang Liu , Yijing Wang , Keping Chen , , Jiang Liu Subject: [PATCH v9 07/11] x86/PCI: update MMCFG information when hot-plugging PCI host bridges Date: Thu, 21 Jun 2012 17:36:59 +0800 Message-ID: <1340271423-4352-8-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.8.msysgit.0 In-Reply-To: <1340271423-4352-1-git-send-email-jiang.liu@huawei.com> References: <1340271423-4352-1-git-send-email-jiang.liu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.108.108.229] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch enhances x86 arch specific code to update MMCFG information when PCI host bridge hotplug event happens. Signed-off-by: Jiang Liu Signed-off-by: Bjorn Helgaas --- arch/x86/include/asm/pci_x86.h | 1 + arch/x86/pci/acpi.c | 71 ++++++++++++++++++++++++++++++++++++++++ arch/x86/pci/mmconfig_32.c | 2 +- arch/x86/pci/mmconfig_64.c | 2 +- 4 files changed, 74 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index af5018f..b2652e9 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -100,6 +100,7 @@ struct pci_raw_ops { extern const struct pci_raw_ops *raw_pci_ops; extern const struct pci_raw_ops *raw_pci_ext_ops; +extern const struct pci_raw_ops pci_mmcfg; extern const struct pci_raw_ops pci_direct_conf1; extern bool port_cf9_safe; diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 2bb885a..f701179 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include @@ -13,6 +14,12 @@ struct pci_root_info { unsigned int res_num; struct resource *res; struct pci_sysdata sd; +#ifdef CONFIG_PCI_MMCONFIG + bool mcfg_added; + u16 segment; + u8 start_bus; + u8 end_bus; +#endif }; static bool pci_use_crs = true; @@ -119,6 +126,61 @@ void __init pci_acpi_crs_quirks(void) pci_use_crs ? "nocrs" : "use_crs"); } +static int __devinit setup_mcfg_map(struct pci_root_info *info, + u16 seg, u8 start, u8 end, + phys_addr_t addr) +{ +#ifdef CONFIG_PCI_MMCONFIG + int result; + struct device *dev = &info->bridge->dev; + + info->start_bus = start; + info->end_bus = end; + info->mcfg_added = false; + + /* return success if MMCFG is not in use */ + if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg) + return 0; + + if (!(pci_probe & PCI_PROBE_MMCONF)) { + /* still could use raw_pci_ops for devices on segment 0 */ + if (seg) + dev_warn(dev, + "MMCONFIG is disabled, can't access extended " + "configuration space under this bridge.\n"); + return 0; + } + + result = pci_mmconfig_insert(dev, seg, start, end, addr); + if (result == 0) { + /* enable MMCFG if it hasn't been enabled yet */ + if (raw_pci_ext_ops == NULL) + raw_pci_ext_ops = &pci_mmcfg; + info->mcfg_added = true; + } else if (result != -EEXIST && addr) { + /* + * Failure in adding MMCFG information is not fatal, + * just can't access [extended] configuration space of + * devices under this host bridge. + */ + dev_warn(dev, "fail to add MMCONFIG information.\n"); + } +#endif + + return 0; +} + +static void teardown_mcfg_map(struct pci_root_info *info) +{ +#ifdef CONFIG_PCI_MMCONFIG + if (info->mcfg_added) { + pci_mmconfig_delete(info->segment, info->start_bus, + info->end_bus); + info->mcfg_added = false; + } +#endif +} + static acpi_status resource_to_addr(struct acpi_resource *resource, struct acpi_resource_address64 *addr) @@ -331,8 +393,11 @@ static void __release_pci_root_info(struct pci_root_info *info) free_pci_root_info_res(info); + teardown_mcfg_map(info); + kfree(info); } + static void release_pci_root_info(struct pci_host_bridge *bridge) { struct pci_root_info *info = bridge->release_data; @@ -438,6 +503,12 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) x86_pci_root_bus_resources(busnum, &resources); } + if (root->mcfg_addr) + setup_mcfg_map(info, root->segment, + (u8) root->secondary.start, + (u8) root->secondary.end, + root->mcfg_addr); + bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, &resources); if (bus) { diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c index a22785d..db63ac2 100644 --- a/arch/x86/pci/mmconfig_32.c +++ b/arch/x86/pci/mmconfig_32.c @@ -126,7 +126,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, return 0; } -static const struct pci_raw_ops pci_mmcfg = { +const struct pci_raw_ops pci_mmcfg = { .read = pci_mmcfg_read, .write = pci_mmcfg_write, }; diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c index 4e05779..34c08dd 100644 --- a/arch/x86/pci/mmconfig_64.c +++ b/arch/x86/pci/mmconfig_64.c @@ -90,7 +90,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, return 0; } -static const struct pci_raw_ops pci_mmcfg = { +const struct pci_raw_ops pci_mmcfg = { .read = pci_mmcfg_read, .write = pci_mmcfg_write, };