Patchwork [U-Boot,04/11] snowball: Adding CPU clock initialisation

login
register
mail settings
Submitter mathieu.poirier@linaro.org
Date June 18, 2012, 4:25 p.m.
Message ID <1340036736-2436-5-git-send-email-mathieu.poirier@linaro.org>
Download mbox | patch
Permalink /patch/165546/
State Accepted
Commit 81637e26b38ff532f20663abb897be0ea0931280
Delegated to: Tom Rini
Headers show

Comments

mathieu.poirier@linaro.org - June 18, 2012, 4:25 p.m.
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
---
 arch/arm/cpu/armv7/u8500/clock.c        |   34 +++++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/u8500/cpu.c          |    2 +
 arch/arm/include/asm/arch-u8500/clock.h |    5 +---
 3 files changed, 37 insertions(+), 4 deletions(-)

Patch

diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
index 9e3b873..fcfd61a 100644
--- a/arch/arm/cpu/armv7/u8500/clock.c
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -54,3 +54,37 @@  void u8500_clock_enable(int periph, int cluster, int kern)
 	if (cluster != -1)
 		writel(1 << cluster, &clkrst->pcken);
 }
+
+void db8500_clocks_init(void)
+{
+	/*
+	 * Enable all clocks. This is u-boot, we can enable it all. There is no
+	 * powersave in u-boot.
+	 */
+
+	u8500_clock_enable(1, 9, -1); /* GPIO0 */
+	u8500_clock_enable(2, 11, -1);/* GPIO1 */
+	u8500_clock_enable(3, 8, -1); /* GPIO2 */
+	u8500_clock_enable(5, 1, -1); /* GPIO3 */
+	u8500_clock_enable(3, 6, 6);  /* UART2 */
+	u8500_clock_enable(3, 3, 3);  /* I2C0 */
+	u8500_clock_enable(1, 5, 5);  /* SDI0 */
+	u8500_clock_enable(2, 4, 2);  /* SDI4 */
+	u8500_clock_enable(6, 6, -1); /* MTU0 */
+	u8500_clock_enable(3, 4, 4);  /* SDI2 */
+
+	/*
+	 * Enabling clocks for all devices which are AMBA devices in the
+	 * kernel.  Otherwise they will not get probe()'d because the
+	 * peripheral ID register will not be powered.
+	 */
+
+	/* XXX: some of these differ between ED/V1 */
+
+	u8500_clock_enable(1, 1, 1);  /* UART1 */
+	u8500_clock_enable(1, 0, 0);  /* UART0 */
+	u8500_clock_enable(3, 2, 2);  /* SSP1 */
+	u8500_clock_enable(3, 1, 1);  /* SSP0 */
+	u8500_clock_enable(2, 8, -1); /* SPI0 */
+	u8500_clock_enable(2, 5, 3);  /* MSP2 */
+}
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 04f4b19..fece201 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -27,6 +27,7 @@ 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/prcmu.h>
+#include <asm/arch/clock.h>
 
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
@@ -35,6 +36,7 @@ 
 int arch_cpu_init(void)
 {
 	db8500_prcmu_init();
+	db8500_clocks_init();
 
 	return 0;
 }
diff --git a/arch/arm/include/asm/arch-u8500/clock.h b/arch/arm/include/asm/arch-u8500/clock.h
index b00ab0d..2a14784 100644
--- a/arch/arm/include/asm/arch-u8500/clock.h
+++ b/arch/arm/include/asm/arch-u8500/clock.h
@@ -64,9 +64,6 @@  struct prcmu {
 
 extern void u8500_clock_enable(int periph, int kern, int cluster);
 
-static inline void u8500_prcmu_enable(unsigned int *reg)
-{
-	writel(readl(reg) | (1 << 8), reg);
-}
+void db8500_clocks_init(void);
 
 #endif /* __ASM_ARCH_CLOCK */