From patchwork Thu Jun 14 04:31:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 164795 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9BFA6B6FBE for ; Thu, 14 Jun 2012 14:32:15 +1000 (EST) Received: from localhost ([::1]:40761 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sf1jB-0003fj-Fg for incoming@patchwork.ozlabs.org; Thu, 14 Jun 2012 00:32:13 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50709) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sf1j3-0003f8-Fa for qemu-devel@nongnu.org; Thu, 14 Jun 2012 00:32:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Sf1j1-0008A0-Ay for qemu-devel@nongnu.org; Thu, 14 Jun 2012 00:32:05 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:33625) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sf1j1-00089k-4h for qemu-devel@nongnu.org; Thu, 14 Jun 2012 00:32:03 -0400 Received: by pbbro12 with SMTP id ro12so3358214pbb.4 for ; Wed, 13 Jun 2012 21:32:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:subject:references :in-reply-to:content-type:content-transfer-encoding :x-gm-message-state; bh=wX4p01XojrirUrrzETOLy9exUs56g39lkbHutKWKUEo=; b=ec53mZe2gMxCzqO7wmvFxlFvsHMOXK9rGy9FzqL0Ri/ICDhSEnZCFnPVtP3XPaY27l Gz4L7xBsibbcQgtgsSViojg2gV0jIsxxhD/2KYc9H+JFH7oXoOHd+AeEh4RI9UnKjUIX ++0qUNed++yP1BqhvmXFOWqwb8cvzVYqnHNDLfdGHOiE0s1sBoA6XKtaYFhcMdYEq++r x8k/WuVcjig8CKzmmRopNdZQQoxrKCJN+1H8J4/JidnN7D2aI+LWlKJPW6F9eRM2muqr xO8Nc05F92RQ7EFdKON01CXBS358Z/da6JEHxdawQzkdHcYwYNvvfMnR6K8ibiyyr1VP D39g== Received: by 10.68.218.7 with SMTP id pc7mr3445284pbc.88.1339648321000; Wed, 13 Jun 2012 21:32:01 -0700 (PDT) Received: from [10.61.2.175] (ibmaus65.lnk.telstra.net. [165.228.126.9]) by mx.google.com with ESMTPS id tk1sm8115046pbc.8.2012.06.13.21.31.59 (version=SSLv3 cipher=OTHER); Wed, 13 Jun 2012 21:32:00 -0700 (PDT) Message-ID: <4FD9693E.2090508@ozlabs.ru> Date: Thu, 14 Jun 2012 14:31:58 +1000 From: Alexey Kardashevskiy User-Agent: Mozilla/5.0 (X11; Linux i686; rv:12.0) Gecko/20120428 Thunderbird/12.0.1 MIME-Version: 1.0 To: "qemu-devel@nongnu.org" , kvm-ppc@vger.kernel.org References: <4FD968BB.2000505@ozlabs.ru> In-Reply-To: <4FD968BB.2000505@ozlabs.ru> X-Gm-Message-State: ALoCoQmLNi+Umb5Ky6hU1B6372tOPmOU1R8NZ39GveTRIXRy/bfkmPAHhnF46nza+LSgMLrCGfTD X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Subject: [Qemu-devel] [PATCH 1/3] msi/msix: added functions to API to set up message address and data X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Normally QEMU expects the guest to initialize MSI/MSIX vectors. However on POWER the guest uses RTAS subsystem to configure MSI/MSIX and does not write these vectors to device's config space or MSIX BAR. On the other hand, msi_notify()/msix_notify() write to these vectors to signal the guest about an interrupt so we have to write correct vectors to the devices in order not to change every user of MSI/MSIX. The first aim is to support MSIX for virtio-pci on POWER. There is another patch for POWER coming which introduces a special memory region where MSI/MSIX vectors point to. Signed-off-by: Alexey Kardashevskiy --- hw/msi.c | 14 ++++++++++++++ hw/msi.h | 1 + hw/msix.c | 10 ++++++++++ hw/msix.h | 3 +++ 4 files changed, 28 insertions(+), 0 deletions(-) diff --git a/hw/msi.c b/hw/msi.c index 5d6ceb6..124878a 100644 --- a/hw/msi.c +++ b/hw/msi.c @@ -358,3 +358,17 @@ unsigned int msi_nr_vectors_allocated(const PCIDevice *dev) uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); return msi_nr_vectors(flags); } + +void msi_set_address_data(PCIDevice *dev, uint64_t address, uint16_t data) +{ + uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); + bool msi64bit = flags & PCI_MSI_FLAGS_64BIT; + + if (msi64bit) { + pci_set_quad(dev->config + msi_address_lo_off(dev), address); + } else { + pci_set_long(dev->config + msi_address_lo_off(dev), address); + } + pci_set_word(dev->config + msi_data_off(dev, msi64bit), data); +} + diff --git a/hw/msi.h b/hw/msi.h index 3040bb0..0acf434 100644 --- a/hw/msi.h +++ b/hw/msi.h @@ -34,6 +34,7 @@ void msi_reset(PCIDevice *dev); void msi_notify(PCIDevice *dev, unsigned int vector); void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len); unsigned int msi_nr_vectors_allocated(const PCIDevice *dev); +void msi_set_address_data(PCIDevice *dev, uint64_t address, uint16_t data); static inline bool msi_present(const PCIDevice *dev) { diff --git a/hw/msix.c b/hw/msix.c index 3835eaa..c57c299 100644 --- a/hw/msix.c +++ b/hw/msix.c @@ -414,3 +414,13 @@ void msix_unuse_all_vectors(PCIDevice *dev) return; msix_free_irq_entries(dev); } + +void msix_set_address_data(PCIDevice *dev, int vector, + uint64_t address, uint32_t data) +{ + uint8_t *table_entry = dev->msix_table_page + vector * PCI_MSIX_ENTRY_SIZE; + pci_set_quad(table_entry + PCI_MSIX_ENTRY_LOWER_ADDR, address); + pci_set_long(table_entry + PCI_MSIX_ENTRY_DATA, data); + table_entry[PCI_MSIX_ENTRY_VECTOR_CTRL] &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; +} + diff --git a/hw/msix.h b/hw/msix.h index 5aba22b..e6bb696 100644 --- a/hw/msix.h +++ b/hw/msix.h @@ -29,4 +29,7 @@ void msix_notify(PCIDevice *dev, unsigned vector); void msix_reset(PCIDevice *dev); +void msix_set_address_data(PCIDevice *dev, int vector, + uint64_t address, uint32_t data); + #endif