@@ -44,6 +44,7 @@
#include <asm/arch/mpp.h>
#include "../common/common.h"
+#include "managed_switch.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -374,13 +375,11 @@ void reset_phy(void)
if (miiphy_set_current_dev(name))
return;
- /* enable autoneg on port 0 phy */
- ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 0, 0, 0x3300);
+#if defined(CONFIG_KM_NUSA)
+ ext_switch_program(name, CONFIG_KM_MANAGED_SW_ADDR);
+#endif
- /* egress broadcast franes on all macs, with forwarding */
- ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 16, 4, 0x000f);
- ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 20, 4, 0x000f);
- ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 21, 4, 0x000f);
+ ext_switch_reset(name, CONFIG_KM_MANAGED_SW_ADDR);
}
#endif
@@ -32,9 +32,10 @@ struct switch_reg sw_conf[] = {
/* port 0, PIGY4, autoneg */
{ PORT(0), PORT_PHY, NO_SPEED_FOR },
{ PORT(0), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
+ { PHY(0), PHY_1000_CTRL, NO_ADV },
+ { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
{ PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
FULL_DUPLEX },
- { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
/* port 1, unused */
{ PORT(1), PORT_CTRL, PORT_DIS },
{ PHY(1), PHY_CTRL, PHY_PWR_DOWN },
@@ -51,6 +51,7 @@
#define PHY_CTRL 0x00
#define PHY_100_MBPS 0x2000
+#define PHY_1_GBPS 0x0040
#define AUTONEG_EN 0x1000
#define AUTONEG_RST 0x0200
#define FULL_DUPLEX 0x0100
@@ -62,6 +63,12 @@
#define SPEC_PWR_DOWN 0x0004
#define AUTO_MDIX_EN 0x0060
+#define PHY_1000_CTRL 0x9
+
+#define NO_ADV 0x0000
+#define ADV_1000_FDPX 0x0200
+#define ADV_1000_HDPX 0x0100
+
/* PORT or MAC registers */
#define PORT(itf) (itf+0x10)