Patchwork [committed] Fix PR53647

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Submitter William J. Schmidt
Date June 13, 2012, 12:37 p.m.
Message ID <1339591033.18291.21.camel@gnopaine>
Download mbox | patch
Permalink /patch/164651/
State New
Headers show

Comments

William J. Schmidt - June 13, 2012, 12:37 p.m.
It turns out we have some old machine descriptions that have no L1
cache, so we must account for a zero line size.  Regstrapped on
powerpc64-linux-unknown-gnu with no new failures, committed as obvious.

Thanks,
Bill


2012-06-13  Bill Schmidt  <wschmidt@linux.ibm.com>

	PR tree-optimization/53647
	* tree-ssa-phiopt.c (gate_hoist_loads): Skip transformation for
	targets with no defined cache line size.

Patch

Index: gcc/tree-ssa-phiopt.c
===================================================================
--- gcc/tree-ssa-phiopt.c	(revision 188482)
+++ gcc/tree-ssa-phiopt.c	(working copy)
@@ -1976,12 +1976,14 @@  hoist_adjacent_loads (basic_block bb0, basic_block
 /* Determine whether we should attempt to hoist adjacent loads out of
    diamond patterns in pass_phiopt.  Always hoist loads if
    -fhoist-adjacent-loads is specified and the target machine has
-   a conditional move instruction.  */
+   both a conditional move instruction and a defined cache line size.  */
 
 static bool
 gate_hoist_loads (void)
 {
-  return (flag_hoist_adjacent_loads == 1 && HAVE_conditional_move);
+  return (flag_hoist_adjacent_loads == 1
+	  && PARAM_VALUE (PARAM_L1_CACHE_LINE_SIZE)
+	  && HAVE_conditional_move);
 }
 
 /* Always do these optimizations if we have SSA