Patchwork MIPS testsuite patch for --with-synci configurations

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Submitter Steve Ellcey
Date June 11, 2012, 7:30 p.m.
Message ID <c5ae184f-d24d-4877-b68a-97679eda3832@EXCHHUB01.MIPS.com>
Download mbox | patch
Permalink /patch/164241/
State New
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Comments

Steve Ellcey - June 11, 2012, 7:30 p.m.
This patch is to fix MIPS failures that occcur when configuring GCC with the
-with-synci option.  In this case GCC will generate the synci instruction
by default if on a MIPS architecture that supports it .  When on an
architecture that does not support synci, GCC will not generate it by default
but it does generate a warning saying that it is not doing so and that
warning is causing tests that explicitly specify a MIPS architecture that
does not support synci but do not explicitly turn off synci to fail with an
extra, unexpected warning.

I initially looked at changing GCC to remove the warning but that did
not look workable, see http://gcc.gnu.org/ml/gcc/2012-06/msg00100.html
for more details.

This patch addes the -mno-synci flag to MIPS tests that specify an
architecture that does not support synci, thus getting rid of the
warning message and making the tests pass.  Tested with the mips-linux-gnu
and mips-sde-elf targets both with and without --with-synci on the
GCC configuration.

OK to checkin?

Steve Ellcey
sellcey@mips.com

2012-06-11  Steve Ellcey  <sellcey@mips.com>

	* gcc.target/mips/call-saved-1.c: Add -mno-synci flag.
	* gcc.target/mips/call-saved-2.c: Ditto.
	* gcc.target/mips/call-saved-3.c: Ditto.
	* gcc.target/mips/clear-cache-2.c: Ditto.
	* gcc.target/mips/ext-8.c: Ditto.
	* gcc.target/mips/extend-2.c: Ditto.
	* gcc.target/mips/fix-r4000-1.c: Ditto.
	* gcc.target/mips/fix-r4000-10.c: Ditto.
	* gcc.target/mips/fix-r4000-11.c: Ditto.
	* gcc.target/mips/fix-r4000-12.c: Ditto.
	* gcc.target/mips/fix-r4000-2.c: Ditto.
	* gcc.target/mips/fix-r4000-3.c: Ditto.
	* gcc.target/mips/fix-r4000-4.c: Ditto.
	* gcc.target/mips/fix-r4000-5.c: Ditto.
	* gcc.target/mips/fix-r4000-6.c: Ditto.
	* gcc.target/mips/fix-r4000-7.c: Ditto.
	* gcc.target/mips/fix-r4000-8.c: Ditto.
	* gcc.target/mips/fix-r4000-9.c: Ditto.
	* gcc.target/mips/fix-vr4130-1.c: Ditto.
	* gcc.target/mips/fix-vr4130-2.c: Ditto.
	* gcc.target/mips/fix-vr4130-3.c: Ditto.
	* gcc.target/mips/fix-vr4130-4.c: Ditto.
	* gcc.target/mips/fpr-moves-1.c: Ditto.
	* gcc.target/mips/fpr-moves-2.c: Ditto.
	* gcc.target/mips/loongson-muldiv-1.c: Ditto.
	* gcc.target/mips/loongson-muldiv-2.c: Ditto.
	* gcc.target/mips/loongson-shift-count-truncated-1.c: Ditto.
	* gcc.target/mips/loongson-simd.c: Ditto.
	* gcc.target/mips/loongson3a-muldiv-1.c: Ditto.
	* gcc.target/mips/loongson3a-muldiv-2.c: Ditto.
	* gcc.target/mips/madd-1.c: Ditto.
	* gcc.target/mips/madd-2.c: Ditto.
	* gcc.target/mips/madd-5.c: Ditto.
	* gcc.target/mips/madd-6.c: Ditto.
	* gcc.target/mips/madd-7.c: Ditto.
	* gcc.target/mips/madd-8.c: Ditto.
	* gcc.target/mips/maddu-1.c: Ditto.
	* gcc.target/mips/maddu-2.c: Ditto.
	* gcc.target/mips/msub-1.c: Ditto.
	* gcc.target/mips/msub-2.c: Ditto.
	* gcc.target/mips/msub-5.c: Ditto.
	* gcc.target/mips/msub-6.c: Ditto.
	* gcc.target/mips/msub-7.c: Ditto.
	* gcc.target/mips/msub-8.c: Ditto.
	* gcc.target/mips/msubu-1.c: Ditto.
	* gcc.target/mips/msubu-2.c: Ditto.
	* gcc.target/mips/nmadd-1.c: Ditto.
	* gcc.target/mips/nmadd-2.c: Ditto.
	* gcc.target/mips/nmadd-3.c: Ditto.
	* gcc.target/mips/no-smartmips-ror-1.c: Ditto.
	* gcc.target/mips/pr34831.c: Ditto.
	* gcc.target/mips/r10k-cache-barrier-10.c: Ditto.
	* gcc.target/mips/r3900-mult.c: Ditto.
	* gcc.target/mips/rsqrt-1.c: Ditto.
	* gcc.target/mips/rsqrt-2.c: Ditto.
	* gcc.target/mips/rsqrt-3.c: Ditto.
	* gcc.target/mips/rsqrt-4.c: Ditto.
	* gcc.target/mips/sb1-1.c: Ditto.
	* gcc.target/mips/vr-mult-1.c: Ditto.
	* gcc.target/mips/vr-mult-2.c: Ditto.
David Daney - June 12, 2012, 1:24 a.m.
On 06/11/2012 12:30 PM, Steve Ellcey wrote:
> This patch is to fix MIPS failures that occcur when configuring GCC with the
> -with-synci option.  In this case GCC will generate the synci instruction
> by default if on a MIPS architecture that supports it .  When on an
> architecture that does not support synci, GCC will not generate it by default
> but it does generate a warning saying that it is not doing so and that
> warning is causing tests that explicitly specify a MIPS architecture that
> does not support synci but do not explicitly turn off synci to fail with an
> extra, unexpected warning.
>
> I initially looked at changing GCC to remove the warning but that did
> not look workable, see http://gcc.gnu.org/ml/gcc/2012-06/msg00100.html
> for more details.
>
> This patch addes the -mno-synci flag to MIPS tests that specify an
> architecture that does not support synci, thus getting rid of the
> warning message and making the tests pass.  Tested with the mips-linux-gnu
> and mips-sde-elf targets both with and without --with-synci on the
> GCC configuration.
>
> OK to checkin?

I wonder if it would make more sense to modify the testsuite driver to 
take care of this.  It seems like the set of files with the -mno-synci 
annotation could easily become different than the set that requires it.

David Daney

>
> Steve Ellcey
> sellcey@mips.com
>
> 2012-06-11  Steve Ellcey<sellcey@mips.com>
>
> 	* gcc.target/mips/call-saved-1.c: Add -mno-synci flag.
> 	* gcc.target/mips/call-saved-2.c: Ditto.
> 	* gcc.target/mips/call-saved-3.c: Ditto.
> 	* gcc.target/mips/clear-cache-2.c: Ditto.
> 	* gcc.target/mips/ext-8.c: Ditto.
> 	* gcc.target/mips/extend-2.c: Ditto.
> 	* gcc.target/mips/fix-r4000-1.c: Ditto.
> 	* gcc.target/mips/fix-r4000-10.c: Ditto.
> 	* gcc.target/mips/fix-r4000-11.c: Ditto.
> 	* gcc.target/mips/fix-r4000-12.c: Ditto.
> 	* gcc.target/mips/fix-r4000-2.c: Ditto.
> 	* gcc.target/mips/fix-r4000-3.c: Ditto.
> 	* gcc.target/mips/fix-r4000-4.c: Ditto.
> 	* gcc.target/mips/fix-r4000-5.c: Ditto.
> 	* gcc.target/mips/fix-r4000-6.c: Ditto.
> 	* gcc.target/mips/fix-r4000-7.c: Ditto.
> 	* gcc.target/mips/fix-r4000-8.c: Ditto.
> 	* gcc.target/mips/fix-r4000-9.c: Ditto.
> 	* gcc.target/mips/fix-vr4130-1.c: Ditto.
> 	* gcc.target/mips/fix-vr4130-2.c: Ditto.
> 	* gcc.target/mips/fix-vr4130-3.c: Ditto.
> 	* gcc.target/mips/fix-vr4130-4.c: Ditto.
> 	* gcc.target/mips/fpr-moves-1.c: Ditto.
> 	* gcc.target/mips/fpr-moves-2.c: Ditto.
> 	* gcc.target/mips/loongson-muldiv-1.c: Ditto.
> 	* gcc.target/mips/loongson-muldiv-2.c: Ditto.
> 	* gcc.target/mips/loongson-shift-count-truncated-1.c: Ditto.
> 	* gcc.target/mips/loongson-simd.c: Ditto.
> 	* gcc.target/mips/loongson3a-muldiv-1.c: Ditto.
> 	* gcc.target/mips/loongson3a-muldiv-2.c: Ditto.
> 	* gcc.target/mips/madd-1.c: Ditto.
> 	* gcc.target/mips/madd-2.c: Ditto.
> 	* gcc.target/mips/madd-5.c: Ditto.
> 	* gcc.target/mips/madd-6.c: Ditto.
> 	* gcc.target/mips/madd-7.c: Ditto.
> 	* gcc.target/mips/madd-8.c: Ditto.
> 	* gcc.target/mips/maddu-1.c: Ditto.
> 	* gcc.target/mips/maddu-2.c: Ditto.
> 	* gcc.target/mips/msub-1.c: Ditto.
> 	* gcc.target/mips/msub-2.c: Ditto.
> 	* gcc.target/mips/msub-5.c: Ditto.
> 	* gcc.target/mips/msub-6.c: Ditto.
> 	* gcc.target/mips/msub-7.c: Ditto.
> 	* gcc.target/mips/msub-8.c: Ditto.
> 	* gcc.target/mips/msubu-1.c: Ditto.
> 	* gcc.target/mips/msubu-2.c: Ditto.
> 	* gcc.target/mips/nmadd-1.c: Ditto.
> 	* gcc.target/mips/nmadd-2.c: Ditto.
> 	* gcc.target/mips/nmadd-3.c: Ditto.
> 	* gcc.target/mips/no-smartmips-ror-1.c: Ditto.
> 	* gcc.target/mips/pr34831.c: Ditto.
> 	* gcc.target/mips/r10k-cache-barrier-10.c: Ditto.
> 	* gcc.target/mips/r3900-mult.c: Ditto.
> 	* gcc.target/mips/rsqrt-1.c: Ditto.
> 	* gcc.target/mips/rsqrt-2.c: Ditto.
> 	* gcc.target/mips/rsqrt-3.c: Ditto.
> 	* gcc.target/mips/rsqrt-4.c: Ditto.
> 	* gcc.target/mips/sb1-1.c: Ditto.
> 	* gcc.target/mips/vr-mult-1.c: Ditto.
> 	* gcc.target/mips/vr-mult-2.c: Ditto.
>
>
[...]
Steve Ellcey - June 12, 2012, 3:01 p.m.
On Mon, 2012-06-11 at 18:24 -0700, David Daney wrote:

> > This patch addes the -mno-synci flag to MIPS tests that specify an
> > architecture that does not support synci, thus getting rid of the
> > warning message and making the tests pass.  Tested with the mips-linux-gnu
> > and mips-sde-elf targets both with and without --with-synci on the
> > GCC configuration.
> >
> > OK to checkin?
> 
> I wonder if it would make more sense to modify the testsuite driver to 
> take care of this.  It seems like the set of files with the -mno-synci 
> annotation could easily become different than the set that requires it.
> 
> David Daney

I did think about that, but the number of flags that I would have to
check for in the testsuite driver to decide whether or not to turn on
-mno-synci was large enough to make me not want to do it that way.

I would need to check the isa= and isa_rev= flags that are currently
handled in the driver, the -mabi flag, the -march flag, and the -mips
flag.  The number of values that each flag could have (particularly
-march) is rather large.  I can imagine people adding a new test and
forgetting to add -mno-synci but that would be easy to fix and no worse
then adding a new -march value and not handling it in the test suite
driver.

Steve Ellcey
sellcey@mips.com

Patch

diff --git a/gcc/testsuite/gcc.target/mips/call-saved-1.c b/gcc/testsuite/gcc.target/mips/call-saved-1.c
index 5c86b6c..068c7c0 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-1.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-1.c
@@ -1,6 +1,6 @@ 
 /* Check that we save all call-saved GPRs in a MIPS16 __builtin_eh_return
    function.  */
-/* { dg-options "(-mips16) isa_rev=0" } */
+/* { dg-options "(-mips16) isa_rev=0 -mno-synci" } */
 
 void bar (void);
 
diff --git a/gcc/testsuite/gcc.target/mips/call-saved-2.c b/gcc/testsuite/gcc.target/mips/call-saved-2.c
index 9ac7a27..1a144ef 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-2.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-2.c
@@ -1,5 +1,5 @@ 
 /* Check that we save non-MIPS16 GPRs if they are explicitly clobbered.  */
-/* { dg-options "(-mips16) isa_rev=0 -O2" } */
+/* { dg-options "(-mips16) isa_rev=0 -mno-synci -O2" } */
 
 MIPS16 void
 foo (void)
diff --git a/gcc/testsuite/gcc.target/mips/call-saved-3.c b/gcc/testsuite/gcc.target/mips/call-saved-3.c
index e178eb0..1b152b1 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-3.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-3.c
@@ -1,6 +1,6 @@ 
 /* Check that we save all call-saved GPRs in a MIPS16 __builtin_setjmp
    function.  */
-/* { dg-options "(-mips16) isa_rev=0 -O2" } */
+/* { dg-options "(-mips16) isa_rev=0 -mno-synci -O2" } */
 
 void bar (void);
 extern int buf[];
diff --git a/gcc/testsuite/gcc.target/mips/clear-cache-2.c b/gcc/testsuite/gcc.target/mips/clear-cache-2.c
index 2c925b8..0c7c71e 100644
--- a/gcc/testsuite/gcc.target/mips/clear-cache-2.c
+++ b/gcc/testsuite/gcc.target/mips/clear-cache-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -mips32" } */
+/* { dg-options "-O2 -mips32 -mno-synci" } */
 /* { dg-final { scan-assembler-not "synci" } } */
 /* { dg-final { scan-assembler-not "jr.hb" } } */
 /* { dg-final { scan-assembler "_flush_cache" } } */
diff --git a/gcc/testsuite/gcc.target/mips/ext-8.c b/gcc/testsuite/gcc.target/mips/ext-8.c
index 90241dd..b619da9 100644
--- a/gcc/testsuite/gcc.target/mips/ext-8.c
+++ b/gcc/testsuite/gcc.target/mips/ext-8.c
@@ -1,6 +1,6 @@ 
 /* Also make sure we don't use ext for MIPS*r1.  */
 /* { dg-do compile } */
-/* { dg-options "-O isa_rev<=1" } */
+/* { dg-options "-O isa_rev<=1 -mno-synci" } */
 /* { dg-final { scan-assembler "\tand\t" } } */
 /* { dg-final { scan-assembler-not "\td?ext\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/extend-2.c b/gcc/testsuite/gcc.target/mips/extend-2.c
index b91ae20..6169e3b 100644
--- a/gcc/testsuite/gcc.target/mips/extend-2.c
+++ b/gcc/testsuite/gcc.target/mips/extend-2.c
@@ -1,6 +1,6 @@ 
 /* Check the shift_shift alternative of the AND patterns.  */
 /* { dg-do compile } */
-/* { dg-options "-O isa_rev<=1 -mgp64" } */
+/* { dg-options "-O isa_rev<=1 -mgp64 -mno-synci" } */
 /* { dg-final { scan-assembler "\tdsrl\t" } } */
 /* { dg-final { scan-assembler "\tdsll\t" } } */
 /* { dg-final { scan-assembler-not "\td?ext\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-1.c b/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
index 551d354..d5033bd 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -O2 -dp" } */
 typedef int int32_t;
 typedef int uint32_t;
 NOMIPS16 int32_t foo (int32_t x, int32_t y) { return x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-10.c b/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
index 8c938b7..6342b61 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
@@ -1,7 +1,7 @@ 
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips3 -mno-synci -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
 typedef unsigned long long uint64_t;
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 NOMIPS16 uint128_t foo (uint64_t x, uint64_t y) { return (uint128_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-11.c b/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
index 7cfad3d..9893526 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef long long int64_t;
 NOMIPS16 int64_t foo (int64_t x) { return x / 11993; }
 /* { dg-final { scan-assembler "[concat {\tdmult\t\$4,\$[0-9]+[^\n]+smuldi3_highpart[^\n]+\n\tmfhi\t\$[0-9]+\n}]" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-12.c b/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
index d449283..e3db138 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef unsigned long long uint64_t;
 NOMIPS16 uint64_t foo (uint64_t x) { return x / 11993; }
 /* { dg-final { scan-assembler "[concat {\tdmultu\t\$4,\$[0-9]+[^\n]+umuldi3_highpart[^\n]+\n\tmfhi\t\$[0-9]+\n}]" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
index 6cb7d35..b094f8a 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
+/* { dg-options "-mips1 -mno-synci -mfix-r4000 -O2 -dp -EB" } */
 typedef int int32_t;
 typedef long long int64_t;
 NOMIPS16 int32_t foo (int32_t x, int32_t y) { return ((int64_t) x * y) >> 32; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-3.c b/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
index bd12509..f8aec6b 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
+/* { dg-options "-mips1 -mno-synci -mfix-r4000 -O2 -dp -EB" } */
 typedef unsigned int uint32_t;
 typedef unsigned long long uint64_t;
 NOMIPS16 uint32_t foo (uint32_t x, uint32_t y) { return ((uint64_t) x * y) >> 32; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-4.c b/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
index 3854db8..5bd6e7d 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
@@ -1,7 +1,7 @@ 
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips1 -mno-synci -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
 typedef int int32_t;
 typedef long long int64_t;
 NOMIPS16 int64_t foo (int32_t x, int32_t y) { return (int64_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-5.c b/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
index c46300f..478740a 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
@@ -1,7 +1,7 @@ 
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips1 -mno-synci -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
 typedef unsigned int uint32_t;
 typedef unsigned long long uint64_t;
 NOMIPS16 uint64_t foo (uint32_t x, uint32_t y) { return (uint64_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-6.c b/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
index 1e33cc4..765fb0f 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef long long int64_t;
 typedef unsigned long long uint64_t;
 NOMIPS16 int64_t foo (int64_t x, int64_t y) { return x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-7.c b/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
index 118ba99..922483c 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -O2 -mgp64 -dp -EB" } */
 typedef long long int64_t;
 typedef int int128_t __attribute__((mode(TI)));
 NOMIPS16 int64_t foo (int64_t x, int64_t y) { return ((int128_t) x * y) >> 64; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-8.c b/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
index f2c71c1..ee4b054 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
+/* { dg-options "-march=r4000 -mno-synci -mfix-r4000 -O2 -mgp64 -dp -EB" } */
 typedef unsigned long long uint64_t;
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 NOMIPS16 uint64_t foo (uint64_t x, uint64_t y) { return ((uint128_t) x * y) >> 64; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-9.c b/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
index da9c113..d281606 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
@@ -1,7 +1,7 @@ 
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips3 -mno-synci -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
 typedef long long int64_t;
 typedef int int128_t __attribute__((mode(TI)));
 NOMIPS16 int128_t foo (int64_t x, int64_t y) { return (int128_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
index f4eb492..51feb74 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=vr4130 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mno-synci -mfix-vr4130" } */
 NOMIPS16 unsigned int
 foo (unsigned int x, unsigned int y)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
index 18708cb..c78d9e4 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
@@ -1,4 +1,4 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=vr4130 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mno-synci -mfix-vr4130" } */
 NOMIPS16 int foo (void) { int r; asm ("# foo" : "=l" (r)); return r; }
 /* { dg-final { scan-assembler "\tmacc\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
index d3399d1..16ade44 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mno-synci -mgp64 -mfix-vr4130" } */
 NOMIPS16 unsigned long long
 foo (unsigned long long x, unsigned long long y)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
index 8b307c6..e236b47 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mno-synci -mgp64 -mfix-vr4130" } */
 NOMIPS16 long long
 foo (void)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-1.c b/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
index 92977e0..717a7b6 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-mabi=32 -mhard-float -mips1 -O2 -EL" } */
+/* { dg-options "-mabi=32 -mno-synci -mhard-float -mips1 -O2 -EL" } */
 
 NOMIPS16 void
 foo (double d, double *x)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-2.c b/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
index 3f4f833..be35b8c 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-mabi=32 -mhard-float -mips1 -O2 -EB" } */
+/* { dg-options "-mabi=32 -mno-synci -mhard-float -mips1 -O2 -EB" } */
 
 NOMIPS16 void
 foo (double d, double *x)
diff --git a/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c b/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
index fd7289c..1c3cc2c 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 isa=loongson" } */
+/* { dg-options "-O2 isa=loongson -mno-synci" } */
 
 typedef int st;
 typedef unsigned int ut;
diff --git a/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c b/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
index 6f1f138..c1a506d 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 isa=loongson -mgp64" } */
+/* { dg-options "-O2 isa=loongson -mno-synci -mgp64" } */
 
 typedef long long st;
 typedef unsigned long long ut;
diff --git a/gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c b/gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c
index 1c892d8..65569c2 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c
@@ -4,9 +4,9 @@ 
 /* loongson.h does not handle or check for MIPS16ness.  There doesn't
    seem any good reason for it to, given that the Loongson processors
    do not support MIPS16.  */
-/* { dg-options "isa=loongson -mhard-float -mno-mips16 -O1" } */
+/* { dg-options "isa=loongson -mno-synci -mhard-float -mno-mips16 -O1" } */
 /* See PR 52155.  */
-/* { dg-options "isa=loongson -mhard-float -mno-mips16 -O1 -mlong64" { mips*-*-elf* && ilp32 } } */
+/* { dg-options "isa=loongson -mno-synci -mhard-float -mno-mips16 -O1 -mlong64" { mips*-*-elf* && ilp32 } } */
 
 #include "loongson.h"
 #include <assert.h>
diff --git a/gcc/testsuite/gcc.target/mips/loongson-simd.c b/gcc/testsuite/gcc.target/mips/loongson-simd.c
index ae3565f..c9b60f8 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-simd.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-simd.c
@@ -22,7 +22,7 @@  along with GCC; see the file COPYING3.  If not see
 /* loongson.h does not handle or check for MIPS16ness.  There doesn't
    seem any good reason for it to, given that the Loongson processors
    do not support MIPS16.  */
-/* { dg-options "isa=loongson -mhard-float -mno-mips16 -flax-vector-conversions" } */
+/* { dg-options "isa=loongson -mno-synci -mhard-float -mno-mips16 -flax-vector-conversions" } */
 
 #include "loongson.h"
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-1.c b/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-1.c
index cc15b83..ebbac16 100644
--- a/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-1.c
+++ b/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=loongson3a" } */
+/* { dg-options "-O2 -march=loongson3a -mno-synci" } */
 
 typedef int st;
 typedef unsigned int ut;
diff --git a/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-2.c b/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-2.c
index 592b492..3c84d0a 100644
--- a/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-2.c
+++ b/gcc/testsuite/gcc.target/mips/loongson3a-muldiv-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=loongson3a -mgp64" } */
+/* { dg-options "-O2 -march=loongson3a -mno-synci -mgp64" } */
 
 typedef long long st;
 typedef unsigned long long ut;
diff --git a/gcc/testsuite/gcc.target/mips/madd-1.c b/gcc/testsuite/gcc.target/mips/madd-1.c
index 53881a4..4828c64 100644
--- a/gcc/testsuite/gcc.target/mips/madd-1.c
+++ b/gcc/testsuite/gcc.target/mips/madd-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr4130 -mgp32" } */
+/* { dg-options "-O2 -march=vr4130 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmacc\t\\\$1," 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-2.c b/gcc/testsuite/gcc.target/mips/madd-2.c
index eab7a68..e1d4bda 100644
--- a/gcc/testsuite/gcc.target/mips/madd-2.c
+++ b/gcc/testsuite/gcc.target/mips/madd-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmadd\t" 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-5.c b/gcc/testsuite/gcc.target/mips/madd-5.c
index 1ad1c91..a0934a1 100644
--- a/gcc/testsuite/gcc.target/mips/madd-5.c
+++ b/gcc/testsuite/gcc.target/mips/madd-5.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-times "\tmadd\t" 4 } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
 /* { dg-final { scan-assembler-times "\tmflo\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/mips/madd-6.c b/gcc/testsuite/gcc.target/mips/madd-6.c
index 4e5afad..d440a39 100644
--- a/gcc/testsuite/gcc.target/mips/madd-6.c
+++ b/gcc/testsuite/gcc.target/mips/madd-6.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-not "\tmadd\t" } } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler "\taddu\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/madd-7.c b/gcc/testsuite/gcc.target/mips/madd-7.c
index b43d720..14d239e 100644
--- a/gcc/testsuite/gcc.target/mips/madd-7.c
+++ b/gcc/testsuite/gcc.target/mips/madd-7.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-not "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tmadd\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c b/gcc/testsuite/gcc.target/mips/madd-8.c
index 35092a8..2f4138c 100644
--- a/gcc/testsuite/gcc.target/mips/madd-8.c
+++ b/gcc/testsuite/gcc.target/mips/madd-8.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler-not "\tmadd\t" } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/maddu-1.c b/gcc/testsuite/gcc.target/mips/maddu-1.c
index 04161ce..d8f72dd 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-1.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr4130 -mgp32" } */
+/* { dg-options "-O2 -march=vr4130 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaccu\t\\\$1," 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/maddu-2.c b/gcc/testsuite/gcc.target/mips/maddu-2.c
index a9768f1..daec283 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-2.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaddu\t" 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/msub-1.c b/gcc/testsuite/gcc.target/mips/msub-1.c
index 803ea77..274d8ef 100644
--- a/gcc/testsuite/gcc.target/mips/msub-1.c
+++ b/gcc/testsuite/gcc.target/mips/msub-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5400 -mgp32" } */
+/* { dg-options "-O2 -march=vr5400 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsac\t\\\$0," 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-2.c b/gcc/testsuite/gcc.target/mips/msub-2.c
index e6cdc2c..519745f 100644
--- a/gcc/testsuite/gcc.target/mips/msub-2.c
+++ b/gcc/testsuite/gcc.target/mips/msub-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsub\t" 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-5.c b/gcc/testsuite/gcc.target/mips/msub-5.c
index dcb124a..cafa11f 100644
--- a/gcc/testsuite/gcc.target/mips/msub-5.c
+++ b/gcc/testsuite/gcc.target/mips/msub-5.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-times "\tmsub\t" 4 } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
 /* { dg-final { scan-assembler-times "\tmflo\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/mips/msub-6.c b/gcc/testsuite/gcc.target/mips/msub-6.c
index ee4ca3d..22561e1 100644
--- a/gcc/testsuite/gcc.target/mips/msub-6.c
+++ b/gcc/testsuite/gcc.target/mips/msub-6.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-not "\tmsub\t" } } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tsubu\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/msub-7.c b/gcc/testsuite/gcc.target/mips/msub-7.c
index 7ae96ac..12eeaa5 100644
--- a/gcc/testsuite/gcc.target/mips/msub-7.c
+++ b/gcc/testsuite/gcc.target/mips/msub-7.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler-not "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tmsub\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c b/gcc/testsuite/gcc.target/mips/msub-8.c
index 49d67f2..67ac219 100644
--- a/gcc/testsuite/gcc.target/mips/msub-8.c
+++ b/gcc/testsuite/gcc.target/mips/msub-8.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc -mno-synci" } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler-not "\tmsub\t" } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/msubu-1.c b/gcc/testsuite/gcc.target/mips/msubu-1.c
index ae80403..fdd1e54 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-1.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5400 -mgp32" } */
+/* { dg-options "-O2 -march=vr5400 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsacu\t\\\$0," 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/msubu-2.c b/gcc/testsuite/gcc.target/mips/msubu-2.c
index 186dc47..9fca774 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-2.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mno-synci -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsubu\t" 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-1.c b/gcc/testsuite/gcc.target/mips/nmadd-1.c
index 123d487..45321d2 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-1.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -ffast-math isa=4 -mhard-float" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mno-synci -mhard-float" } */
 /* { dg-final { scan-assembler "nmadd.s" } } */
 /* { dg-final { scan-assembler "nmadd.d" } } */
 /* { dg-final { scan-assembler "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-2.c b/gcc/testsuite/gcc.target/mips/nmadd-2.c
index 90e4d83..8d11fe7 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-2.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */
+/* { dg-options "-O2 -fno-fast-math -ffinite-math-only isa=4 -mno-synci -mhard-float" } */
 /* { dg-final { scan-assembler "nmadd.s" } } */
 /* { dg-final { scan-assembler "nmadd.d" } } */
 /* { dg-final { scan-assembler "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-3.c b/gcc/testsuite/gcc.target/mips/nmadd-3.c
index df72618..8be5ce5 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-3.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-3.c
@@ -1,7 +1,7 @@ 
 /* The same code as nmadd-2.c, but compiled with -fno-finite-math-only.
    We can't use nmadd and nmsub in that case.  */
 /* { dg-do compile } */
-/* { dg-options "-O2 -fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */
+/* { dg-options "-O2 -fno-fast-math -fno-finite-math-only isa=4 -mno-synci -mhard-float" } */
 /* { dg-final { scan-assembler-not "nmadd.s" } } */
 /* { dg-final { scan-assembler-not "nmadd.d" } } */
 /* { dg-final { scan-assembler-not "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c b/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
index d1f50a8..2756ef3 100644
--- a/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
+++ b/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O -mno-smartmips -march=mips32" } */
+/* { dg-options "-O -mno-smartmips -march=mips32 -mno-synci" } */
 
 NOMIPS16 int rotate_left (unsigned a, unsigned s)
 {
diff --git a/gcc/testsuite/gcc.target/mips/pr34831.c b/gcc/testsuite/gcc.target/mips/pr34831.c
index 2da436f..bc90860 100644
--- a/gcc/testsuite/gcc.target/mips/pr34831.c
+++ b/gcc/testsuite/gcc.target/mips/pr34831.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-ffast-math -mips64 -mgp32" } */
+/* { dg-options "-ffast-math -mips64 -mgp32 -mno-synci" } */
 
 double
 foo (void)
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
index 68c4b7e..3f44251 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mno-synci -mbranch-likely -mno-abicalls" } */
 int bar (int);
 
 /* Test that code after a branch-likely does not get an unnecessary
diff --git a/gcc/testsuite/gcc.target/mips/r3900-mult.c b/gcc/testsuite/gcc.target/mips/r3900-mult.c
index 4dc2b00..944431e 100644
--- a/gcc/testsuite/gcc.target/mips/r3900-mult.c
+++ b/gcc/testsuite/gcc.target/mips/r3900-mult.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=r3900" } */
+/* { dg-options "-march=r3900 -mno-synci" } */
 /* { dg-final { scan-assembler "\tmult\t\[^\n\]*,\[^\n\]*," } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-1.c b/gcc/testsuite/gcc.target/mips/rsqrt-1.c
index f0a9b3a..7ebd29f 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-1.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -ffast-math isa=4 -mhard-float -mgp64" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mno-synci -mhard-float -mgp64" } */
 /* { dg-final { scan-assembler "rsqrt.d" } } */
 /* { dg-final { scan-assembler "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-2.c b/gcc/testsuite/gcc.target/mips/rsqrt-2.c
index bc81039..ce47e65 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-2.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-2.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -ffast-math isa=4 -mhard-float -mgp64" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mno-synci -mhard-float -mgp64" } */
 /* { dg-final { scan-assembler "rsqrt.d" } } */
 /* { dg-final { scan-assembler "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-3.c b/gcc/testsuite/gcc.target/mips/rsqrt-3.c
index cfa771e..edcc03a 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-3.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-3.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 isa=4 -mhard-float" } */
+/* { dg-options "-O2 isa=4 -mno-synci -mhard-float" } */
 /* { dg-final { scan-assembler-not "rsqrt.d" } } */
 /* { dg-final { scan-assembler-not "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-4.c b/gcc/testsuite/gcc.target/mips/rsqrt-4.c
index 726c354..ff58a51 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-4.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-4.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -ffast-math -mips64 -mhard-float -mgp32" } */
+/* { dg-options "-O2 -ffast-math -mips64 -mhard-float -mgp32 -mno-synci" } */
 /* { dg-final { scan-assembler-not "\trsqrt.d\t" } } */
 /* { dg-final { scan-assembler-times "\trsqrt.s\t" 2 } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/sb1-1.c b/gcc/testsuite/gcc.target/mips/sb1-1.c
index 819938f..0f86778 100644
--- a/gcc/testsuite/gcc.target/mips/sb1-1.c
+++ b/gcc/testsuite/gcc.target/mips/sb1-1.c
@@ -1,6 +1,6 @@ 
 /* Test SB-1 v2sf extensions.  */
 /* { dg-do compile } */ 
-/* { dg-options "-march=sb1 -O2 -mpaired-single -mgp64 -ffast-math" } */
+/* { dg-options "-march=sb1 -mno-synci -O2 -mpaired-single -mgp64 -ffast-math" } */
 /* { dg-final { scan-assembler "div.ps" } } */ 
 /* { dg-final { scan-assembler "recip.ps" } } */ 
 /* { dg-final { scan-assembler "sqrt.ps" } } */ 
diff --git a/gcc/testsuite/gcc.target/mips/vr-mult-1.c b/gcc/testsuite/gcc.target/mips/vr-mult-1.c
index 2ed4f2f..a294775 100644
--- a/gcc/testsuite/gcc.target/mips/vr-mult-1.c
+++ b/gcc/testsuite/gcc.target/mips/vr-mult-1.c
@@ -1,7 +1,7 @@ 
 /* Make sure that mul/addu is preferred over mtlo/macc and that mul/subu
    is preferred over mtlo/msac.  */
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5400" } */
+/* { dg-options "-O2 -march=vr5400 -mno-synci" } */
 NOMIPS16 int f1 (int a, int b, int c) { return a + b * c; }
 NOMIPS16 int f2 (int a, int b, int c) { return a - b * c; }
 /* { dg-final { scan-assembler "\tmul\t.*\tmul\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/vr-mult-2.c b/gcc/testsuite/gcc.target/mips/vr-mult-2.c
index 7e8be5e..13456c4 100644
--- a/gcc/testsuite/gcc.target/mips/vr-mult-2.c
+++ b/gcc/testsuite/gcc.target/mips/vr-mult-2.c
@@ -1,7 +1,7 @@ 
 /* Make sure that mul/addu is preferred over mtlo/macc and that mul/subu
    is preferred over mtlo/msac.  */
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=vr5500" } */
+/* { dg-options "-O2 -march=vr5500 -mno-synci" } */
 NOMIPS16 int f1 (int a, int b, int c) { return a + b * c; }
 NOMIPS16 int f2 (int a, int b, int c) { return a - b * c; }
 /* { dg-final { scan-assembler "\tmul\t.*\tmul\t" } } */