From patchwork Mon Jun 11 15:05:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 164199 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0CC18100863 for ; Tue, 12 Jun 2012 01:05:56 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755594Ab2FKPFl (ORCPT ); Mon, 11 Jun 2012 11:05:41 -0400 Received: from moutng.kundenserver.de ([212.227.17.9]:55567 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755586Ab2FKPFk (ORCPT ); Mon, 11 Jun 2012 11:05:40 -0400 Received: from benhur.adnet.avionic-design.de (p548E0634.dip0.t-ipconnect.de [84.142.6.52]) by mrelayeu.kundenserver.de (node=mreu0) with ESMTP (Nemesis) id 0LvNnr-1Rw4Kl257j-010HuU; Mon, 11 Jun 2012 17:05:26 +0200 Received: from mailbox.adnet.avionic-design.de (add-virt-zarafa.adnet.avionic-design.de [172.20.129.9]) by benhur.adnet.avionic-design.de (Postfix) with ESMTP id 272AC2C4124; Mon, 11 Jun 2012 17:05:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mailbox.adnet.avionic-design.de (Postfix) with ESMTP id 5E03C2A281BB; Mon, 11 Jun 2012 17:05:23 +0200 (CEST) X-Virus-Scanned: amavisd-new at avionic-design.de Received: from mailbox.adnet.avionic-design.de ([127.0.0.1]) by localhost (mailbox.avionic-design.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id a4eR7gshlAMM; Mon, 11 Jun 2012 17:05:22 +0200 (CEST) Received: from localhost (avionic-0098.adnet.avionic-design.de [172.20.31.233]) (Authenticated sender: thierry.reding) by mailbox.adnet.avionic-design.de (Postfix) with ESMTPA id CC1FC2A2819B; Mon, 11 Jun 2012 17:05:21 +0200 (CEST) From: Thierry Reding To: linux-tegra@vger.kernel.org Cc: Jesse Barnes , linux-pci@vger.kernel.org, Grant Likely , Rob Herring , devicetree-discuss@lists.ozlabs.org, Russell King , linux-arm-kernel@lists.infradead.org, Colin Cross , Olof Johansson , Stephen Warren Subject: [PATCH v2 04/10] ARM: tegra: Move tegra_pcie_xclk_clamp() to PMC Date: Mon, 11 Jun 2012 17:05:12 +0200 Message-Id: <1339427118-32263-5-git-send-email-thierry.reding@avionic-design.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1339427118-32263-1-git-send-email-thierry.reding@avionic-design.de> References: <1339427118-32263-1-git-send-email-thierry.reding@avionic-design.de> X-Provags-ID: V02:K0:54IJqiz3pYzmCxur5XWfiHHrYFPJq8PwM/XyPVP9M/X IVlmrEQMk2RBKKedhx6OUZxDKB5r6kVwQFf5ELYMNvHaXY+i+G akOfdhiQm8+d+0Rugsce+NXtsojFnJcXNt0SPlwlNYTVIsEPa6 BrmUMem4+QfDeVxkydH512SpSmkfNLIhmUrg7uFP0T123lZjgf y8O5u8v0mKlSyLqyxn6BXP7LLIgumHOMRe0dZqxTSY7VXgguEV z+Xw7Tw9jwfAjuwamJTKyUgo+SbziS4qG+5gVdTNcpYrqh4MM4 SZRU+utGCS2esFhDZhytGrSsrMPb3+2IUzIL6X2wncSbV5BR6V vzwfo0N3xg9icCgE9eI4FI6mZ3G4Rj32XW74bM7iUO2QJDjF/y 63qIU/nn1H+V1sPQluCu0HB5C5LwNKIYh/9uWk0QXFhlkATWsG syerF Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PMC code already accesses to PMC registers so it makes sense to move this function there as well. While at it, rename the function to tegra_pmc_pcie_xclk_clamp() for consistency. Signed-off-by: Thierry Reding Acked-by: Stephen Warren --- Changes in v2: - none --- arch/arm/mach-tegra/pcie.c | 30 ++++-------------------------- arch/arm/mach-tegra/pmc.c | 16 ++++++++++++++++ arch/arm/mach-tegra/pmc.h | 1 + 3 files changed, 21 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 0e09137..fcdf8bc 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -42,6 +42,7 @@ #include #include "board.h" +#include "pmc.h" /* register definitions */ #define AFI_OFFSET 0x3800 @@ -145,17 +146,6 @@ #define PADS_PLL_CTL_TXCLKREF_DIV10 (0 << 20) #define PADS_PLL_CTL_TXCLKREF_DIV5 (1 << 20) -/* PMC access is required for PCIE xclk (un)clamping */ -#define PMC_SCRATCH42 0x144 -#define PMC_SCRATCH42_PCX_CLAMP (1 << 0) - -static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); - -#define pmc_writel(value, reg) \ - __raw_writel(value, reg_pmc_base + (reg)) -#define pmc_readl(reg) \ - __raw_readl(reg_pmc_base + (reg)) - /* * Tegra2 defines 1GB in the AXI address map for PCIe. * @@ -679,18 +669,6 @@ static int tegra_pcie_enable_controller(void) return 0; } -static void tegra_pcie_xclk_clamp(bool clamp) -{ - u32 reg; - - reg = pmc_readl(PMC_SCRATCH42) & ~PMC_SCRATCH42_PCX_CLAMP; - - if (clamp) - reg |= PMC_SCRATCH42_PCX_CLAMP; - - pmc_writel(reg, PMC_SCRATCH42); -} - static void tegra_pcie_power_off(void) { tegra_periph_reset_assert(tegra_pcie.pcie_xclk); @@ -698,7 +676,7 @@ static void tegra_pcie_power_off(void) tegra_periph_reset_assert(tegra_pcie.pex_clk); tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); - tegra_pcie_xclk_clamp(true); + tegra_pmc_pcie_xclk_clamp(true); } static int tegra_pcie_power_regate(void) @@ -707,7 +685,7 @@ static int tegra_pcie_power_regate(void) tegra_pcie_power_off(); - tegra_pcie_xclk_clamp(true); + tegra_pmc_pcie_xclk_clamp(true); tegra_periph_reset_assert(tegra_pcie.pcie_xclk); tegra_periph_reset_assert(tegra_pcie.afi_clk); @@ -721,7 +699,7 @@ static int tegra_pcie_power_regate(void) tegra_periph_reset_deassert(tegra_pcie.afi_clk); - tegra_pcie_xclk_clamp(false); + tegra_pmc_pcie_xclk_clamp(false); clk_enable(tegra_pcie.afi_clk); clk_enable(tegra_pcie.pex_clk); diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index 7af6a54..399dc3a 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -24,6 +24,10 @@ #define PMC_CTRL 0x0 #define PMC_CTRL_INTR_LOW (1 << 17) +/* PMC access is required for PCIE xclk (un)clamping */ +#define PMC_SCRATCH42 0x144 +#define PMC_SCRATCH42_PCX_CLAMP (1 << 0) + static inline u32 tegra_pmc_readl(u32 reg) { return readl(IO_ADDRESS(TEGRA_PMC_BASE + reg)); @@ -74,3 +78,15 @@ void __init tegra_pmc_init(void) val &= ~PMC_CTRL_INTR_LOW; tegra_pmc_writel(val, PMC_CTRL); } + +void tegra_pmc_pcie_xclk_clamp(bool clamp) +{ + u32 reg; + + reg = tegra_pmc_readl(PMC_SCRATCH42) & ~PMC_SCRATCH42_PCX_CLAMP; + + if (clamp) + reg |= PMC_SCRATCH42_PCX_CLAMP; + + tegra_pmc_writel(reg, PMC_SCRATCH42); +} diff --git a/arch/arm/mach-tegra/pmc.h b/arch/arm/mach-tegra/pmc.h index 8995ee4..2631c9a 100644 --- a/arch/arm/mach-tegra/pmc.h +++ b/arch/arm/mach-tegra/pmc.h @@ -19,5 +19,6 @@ #define __MACH_TEGRA_PMC_H void tegra_pmc_init(void); +void tegra_pmc_pcie_xclk_clamp(bool clamp); #endif