From patchwork Sat Jun 9 16:19:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 163935 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2B595B6FA0 for ; Sun, 10 Jun 2012 02:32:43 +1000 (EST) Received: from localhost ([::1]:60598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SdOQO-00076Y-5e for incoming@patchwork.ozlabs.org; Sat, 09 Jun 2012 12:22:04 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51670) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SdOOM-0003so-8c for qemu-devel@nongnu.org; Sat, 09 Jun 2012 12:20:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SdOOH-0003S2-Rq for qemu-devel@nongnu.org; Sat, 09 Jun 2012 12:19:57 -0400 Received: from mail-ee0-f45.google.com ([74.125.83.45]:35454) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SdOOH-0003KN-2u for qemu-devel@nongnu.org; Sat, 09 Jun 2012 12:19:53 -0400 Received: by mail-ee0-f45.google.com with SMTP id d41so1793682eek.4 for ; Sat, 09 Jun 2012 09:19:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references; bh=57ZLTlAWsu31CZ4FY7JMK3JBjmmxPYnimdHkrnQZ/uI=; b=pICoCLVsPYMFYEpQH3shsNFcFTAT5gGOGMaglhrymKuDIty5trkvMWFuNZ55xjjpoI WAdaP++W3aZjV+HlTqCRL4NCQgiSV19d999xgqozlHK5ATRN5lBk6tf8XPHN32L8t1XA qYWXuMuG9YbokWbXNhX8rK+KifK01kFr/psnX26plSaaJ+0CcYb98HUExjrbkA1iS/oz v7+ahJBmqCbMDw+Y9KznKhzujcjATV3vVZ5hIo0Nw6P5AFsIfb71KHbGMjyQmjzJ1ak7 LqKn7IPE79sLhYEoVnShwD7x2RYuPatO3MuBtH7r50hBUAJo/jXmqqge3Xly54hpVD0N WMfg== Received: by 10.14.101.136 with SMTP id b8mr5009894eeg.100.1339258792030; Sat, 09 Jun 2012 09:19:52 -0700 (PDT) Received: from localhost.localdomain (blueswirl.broker.freenet6.net. [2001:5c0:1400:b::d5a3]) by mx.google.com with ESMTPS id h53sm33625570eea.1.2012.06.09.09.19.50 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 09 Jun 2012 09:19:51 -0700 (PDT) From: Blue Swirl To: qemu-devel@nongnu.org Date: Sat, 9 Jun 2012 16:19:11 +0000 Message-Id: X-Mailer: git-send-email 1.7.2.5 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 74.125.83.45 Subject: [Qemu-devel] [PATCH 15/25] x86: avoid AREG0 for integer helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 50 +++++++++++++------------- target-i386/int_helper.c | 36 +++++++++--------- target-i386/shift_helper_template.h | 6 ++- target-i386/translate.c | 66 +++++++++++++++++++++------------- 5 files changed, 88 insertions(+), 71 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index ed69e31..b965c5a 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -6,4 +6,3 @@ obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o $(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) -$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index d647e54..67c81bf 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -7,26 +7,26 @@ DEF_HELPER_0(lock, void) DEF_HELPER_0(unlock, void) DEF_HELPER_3(write_eflags, void, env, tl, i32) DEF_HELPER_1(read_eflags, tl, env) -DEF_HELPER_1(divb_AL, void, tl) -DEF_HELPER_1(idivb_AL, void, tl) -DEF_HELPER_1(divw_AX, void, tl) -DEF_HELPER_1(idivw_AX, void, tl) -DEF_HELPER_1(divl_EAX, void, tl) -DEF_HELPER_1(idivl_EAX, void, tl) +DEF_HELPER_2(divb_AL, void, env, tl) +DEF_HELPER_2(idivb_AL, void, env, tl) +DEF_HELPER_2(divw_AX, void, env, tl) +DEF_HELPER_2(idivw_AX, void, env, tl) +DEF_HELPER_2(divl_EAX, void, env, tl) +DEF_HELPER_2(idivl_EAX, void, env, tl) #ifdef TARGET_X86_64 -DEF_HELPER_1(mulq_EAX_T0, void, tl) -DEF_HELPER_1(imulq_EAX_T0, void, tl) -DEF_HELPER_2(imulq_T0_T1, tl, tl, tl) -DEF_HELPER_1(divq_EAX, void, tl) -DEF_HELPER_1(idivq_EAX, void, tl) +DEF_HELPER_2(mulq_EAX_T0, void, env, tl) +DEF_HELPER_2(imulq_EAX_T0, void, env, tl) +DEF_HELPER_3(imulq_T0_T1, tl, env, tl, tl) +DEF_HELPER_2(divq_EAX, void, env, tl) +DEF_HELPER_2(idivq_EAX, void, env, tl) #endif -DEF_HELPER_1(aam, void, int) -DEF_HELPER_1(aad, void, int) -DEF_HELPER_0(aaa, void) -DEF_HELPER_0(aas, void) -DEF_HELPER_0(daa, void) -DEF_HELPER_0(das, void) +DEF_HELPER_2(aam, void, env, int) +DEF_HELPER_2(aad, void, env, int) +DEF_HELPER_1(aaa, void, env) +DEF_HELPER_1(aas, void, env) +DEF_HELPER_1(daa, void, env) +DEF_HELPER_1(das, void, env) DEF_HELPER_1(lsl, tl, tl) DEF_HELPER_1(lar, tl, tl) @@ -207,15 +207,15 @@ DEF_HELPER_3(movq, void, env, ptr, ptr) #define SHIFT 1 #include "ops_sse_header.h" -DEF_HELPER_2(rclb, tl, tl, tl) -DEF_HELPER_2(rclw, tl, tl, tl) -DEF_HELPER_2(rcll, tl, tl, tl) -DEF_HELPER_2(rcrb, tl, tl, tl) -DEF_HELPER_2(rcrw, tl, tl, tl) -DEF_HELPER_2(rcrl, tl, tl, tl) +DEF_HELPER_3(rclb, tl, env, tl, tl) +DEF_HELPER_3(rclw, tl, env, tl, tl) +DEF_HELPER_3(rcll, tl, env, tl, tl) +DEF_HELPER_3(rcrb, tl, env, tl, tl) +DEF_HELPER_3(rcrw, tl, env, tl, tl) +DEF_HELPER_3(rcrl, tl, env, tl, tl) #ifdef TARGET_X86_64 -DEF_HELPER_2(rclq, tl, tl, tl) -DEF_HELPER_2(rcrq, tl, tl, tl) +DEF_HELPER_3(rclq, tl, env, tl, tl) +DEF_HELPER_3(rcrq, tl, env, tl, tl) #endif #include "def-helper.h" diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c index 1a13e4e..f39747e 100644 --- a/target-i386/int_helper.c +++ b/target-i386/int_helper.c @@ -18,7 +18,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "host-utils.h" #include "helper.h" @@ -42,7 +41,7 @@ static const uint8_t rclw_table[32] = { /* division, flags are undefined */ -void helper_divb_AL(target_ulong t0) +void helper_divb_AL(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; @@ -60,7 +59,7 @@ void helper_divb_AL(target_ulong t0) EAX = (EAX & ~0xffff) | (r << 8) | q; } -void helper_idivb_AL(target_ulong t0) +void helper_idivb_AL(CPUX86State *env, target_ulong t0) { int num, den, q, r; @@ -78,7 +77,7 @@ void helper_idivb_AL(target_ulong t0) EAX = (EAX & ~0xffff) | (r << 8) | q; } -void helper_divw_AX(target_ulong t0) +void helper_divw_AX(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; @@ -97,7 +96,7 @@ void helper_divw_AX(target_ulong t0) EDX = (EDX & ~0xffff) | r; } -void helper_idivw_AX(target_ulong t0) +void helper_idivw_AX(CPUX86State *env, target_ulong t0) { int num, den, q, r; @@ -116,7 +115,7 @@ void helper_idivw_AX(target_ulong t0) EDX = (EDX & ~0xffff) | r; } -void helper_divl_EAX(target_ulong t0) +void helper_divl_EAX(CPUX86State *env, target_ulong t0) { unsigned int den, r; uint64_t num, q; @@ -135,7 +134,7 @@ void helper_divl_EAX(target_ulong t0) EDX = (uint32_t)r; } -void helper_idivl_EAX(target_ulong t0) +void helper_idivl_EAX(CPUX86State *env, target_ulong t0) { int den, r; int64_t num, q; @@ -157,7 +156,7 @@ void helper_idivl_EAX(target_ulong t0) /* bcd */ /* XXX: exception */ -void helper_aam(int base) +void helper_aam(CPUX86State *env, int base) { int al, ah; @@ -168,7 +167,7 @@ void helper_aam(int base) CC_DST = al; } -void helper_aad(int base) +void helper_aad(CPUX86State *env, int base) { int al, ah; @@ -179,7 +178,7 @@ void helper_aad(int base) CC_DST = al; } -void helper_aaa(void) +void helper_aaa(CPUX86State *env) { int icarry; int al, ah, af; @@ -203,7 +202,7 @@ void helper_aaa(void) CC_SRC = eflags; } -void helper_aas(void) +void helper_aas(CPUX86State *env) { int icarry; int al, ah, af; @@ -227,7 +226,7 @@ void helper_aas(void) CC_SRC = eflags; } -void helper_daa(void) +void helper_daa(CPUX86State *env) { int old_al, al, af, cf; int eflags; @@ -254,7 +253,7 @@ void helper_daa(void) CC_SRC = eflags; } -void helper_das(void) +void helper_das(CPUX86State *env) { int al, al1, af, cf; int eflags; @@ -375,7 +374,7 @@ static int idiv64(uint64_t *plow, uint64_t *phigh, int64_t b) return 0; } -void helper_mulq_EAX_T0(target_ulong t0) +void helper_mulq_EAX_T0(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -386,7 +385,7 @@ void helper_mulq_EAX_T0(target_ulong t0) CC_SRC = r1; } -void helper_imulq_EAX_T0(target_ulong t0) +void helper_imulq_EAX_T0(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -397,7 +396,8 @@ void helper_imulq_EAX_T0(target_ulong t0) CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63)); } -target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1) +target_ulong helper_imulq_T0_T1(CPUX86State *env, target_ulong t0, + target_ulong t1) { uint64_t r0, r1; @@ -407,7 +407,7 @@ target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1) return r0; } -void helper_divq_EAX(target_ulong t0) +void helper_divq_EAX(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -423,7 +423,7 @@ void helper_divq_EAX(target_ulong t0) EDX = r1; } -void helper_idivq_EAX(target_ulong t0) +void helper_idivq_EAX(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; diff --git a/target-i386/shift_helper_template.h b/target-i386/shift_helper_template.h index dacfdd2..dda0da3 100644 --- a/target-i386/shift_helper_template.h +++ b/target-i386/shift_helper_template.h @@ -41,7 +41,8 @@ #error unhandled operand size #endif -target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) +target_ulong glue(helper_rcl, SUFFIX)(CPUX86State *env, target_ulong t0, + target_ulong t1) { int count, eflags; target_ulong src; @@ -71,7 +72,8 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) return t0; } -target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1) +target_ulong glue(helper_rcr, SUFFIX)(CPUX86State *env, target_ulong t0, + target_ulong t1) { int count, eflags; target_ulong src; diff --git a/target-i386/translate.c b/target-i386/translate.c index 88ae731..ef88d8f 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1763,20 +1763,36 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1, if (is_right) { switch (ot) { - case 0: gen_helper_rcrb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rcrw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcrl(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rcrb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rcrw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcrl(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rcrq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rcrq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } else { switch (ot) { - case 0: gen_helper_rclb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rclw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcll(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rclb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rclw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcll(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rclq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rclq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } @@ -4520,7 +4536,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_mulq_EAX_T0(cpu_T[0]); + gen_helper_mulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4590,7 +4606,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_imulq_EAX_T0(cpu_T[0]); + gen_helper_imulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4600,21 +4616,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divb_AL(cpu_T[0]); + gen_helper_divb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divw_AX(cpu_T[0]); + gen_helper_divw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divl_EAX(cpu_T[0]); + gen_helper_divl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divq_EAX(cpu_T[0]); + gen_helper_divq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4623,21 +4639,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivb_AL(cpu_T[0]); + gen_helper_idivb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivw_AX(cpu_T[0]); + gen_helper_idivw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivl_EAX(cpu_T[0]); + gen_helper_idivl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivq_EAX(cpu_T[0]); + gen_helper_idivq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4850,7 +4866,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #ifdef TARGET_X86_64 if (ot == OT_QUAD) { - gen_helper_imulq_T0_T1(cpu_T[0], cpu_T[0], cpu_T[1]); + gen_helper_imulq_T0_T1(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); } else #endif if (ot == OT_LONG) { @@ -6706,7 +6722,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_daa(); + gen_helper_daa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x2f: /* das */ @@ -6714,7 +6730,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_das(); + gen_helper_das(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x37: /* aaa */ @@ -6722,7 +6738,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aaa(); + gen_helper_aaa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x3f: /* aas */ @@ -6730,7 +6746,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aas(); + gen_helper_aas(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0xd4: /* aam */ @@ -6740,7 +6756,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (val == 0) { gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base); } else { - gen_helper_aam(tcg_const_i32(val)); + gen_helper_aam(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; } break; @@ -6748,7 +6764,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (CODE64(s)) goto illegal_op; val = ldub_code(s->pc++); - gen_helper_aad(tcg_const_i32(val)); + gen_helper_aad(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; break; /************************/