From patchwork Fri Jun 8 01:06:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 163707 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8AA3E100855 for ; Fri, 8 Jun 2012 14:36:37 +1000 (EST) Received: from localhost ([::1]:49969 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScqOU-0001bc-Ob for incoming@patchwork.ozlabs.org; Fri, 08 Jun 2012 00:01:50 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43432) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScnfR-0007m4-Rq for qemu-devel@nongnu.org; Thu, 07 Jun 2012 21:07:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ScnfQ-0006lr-BU for qemu-devel@nongnu.org; Thu, 07 Jun 2012 21:07:09 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:47817) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScnfQ-0006ll-5V for qemu-devel@nongnu.org; Thu, 07 Jun 2012 21:07:08 -0400 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1ScnfO-0003T4-Kw from Maciej_Rozycki@mentor.com ; Thu, 07 Jun 2012 18:07:06 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 7 Jun 2012 18:06:35 -0700 Received: from [172.30.1.189] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Fri, 8 Jun 2012 02:07:04 +0100 Date: Fri, 8 Jun 2012 02:06:55 +0100 From: "Maciej W. Rozycki" To: Message-ID: User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 X-OriginalArrivalTime: 08 Jun 2012 01:06:35.0291 (UTC) FILETIME=[F30AC6B0:01CD4512] X-detected-operating-system: by eggs.gnu.org: Solaris 10 (beta) X-Received-From: 192.94.38.131 X-Mailman-Approved-At: Fri, 08 Jun 2012 00:01:19 -0400 Cc: "Maciej W. Rozycki" , Aurelien Jarno Subject: [Qemu-devel] [PATCH] MIPS: Correct MIPS16/microMIPS branch size calculation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Nathan Froyd Nathan's original terse comment: "Use MIPS_HFLAG_B16 to determine the address of a jump instruction when we need to restart a delay slot instruction." and was not accompanied by a test case nor I have one offhand. However this change appears obviously correct to me, and the same calculation is already used in exception_resume_pc applied to ordinary, Debug and NMI exceptions. This code on the other hand applies to reset exceptions and instruction restarts in the context of I/O. Signed-off-by: Maciej W. Rozycki Reviewed-by: Richard Henderson --- Sent on behalf of Nathan, who's since left the company. Please apply. Maciej qemu-mips-b16.diff Index: qemu-git-trunk/exec.c =================================================================== --- qemu-git-trunk.orig/exec.c 2012-06-04 05:34:18.655419589 +0100 +++ qemu-git-trunk/exec.c 2012-06-04 05:42:53.295516541 +0100 @@ -4235,7 +4235,7 @@ void cpu_io_recompile(CPUArchState *env, branch. */ #if defined(TARGET_MIPS) if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) { - env->active_tc.PC -= 4; + env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); env->icount_decr.u16.low++; env->hflags &= ~MIPS_HFLAG_BMASK; } Index: qemu-git-trunk/target-mips/translate.c =================================================================== --- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 05:42:49.475411277 +0100 +++ qemu-git-trunk/target-mips/translate.c 2012-06-04 05:42:53.295516541 +0100 @@ -12796,7 +12796,8 @@ void cpu_state_reset(CPUMIPSState *env) if (env->hflags & MIPS_HFLAG_BMASK) { /* If the exception was raised from a delay slot, come back to the jump. */ - env->CP0_ErrorEPC = env->active_tc.PC - 4; + env->CP0_ErrorEPC = (env->active_tc.PC + - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4)); } else { env->CP0_ErrorEPC = env->active_tc.PC; }