| Message ID | 1338485043-21666-9-git-send-email-fabio.estevam@freescale.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Anatolij Gustschin |
| Headers | show |
On 31.05.2012 19:24, Fabio Estevam wrote:
> Add splaschscreen support.
Here and in the subject a typo? splaschscreen -> splashscreen?
Best regards
Dirk
Hi Dirk, On Sat, Jun 2, 2012 at 3:46 AM, Dirk Behme <dirk.behme@googlemail.com> wrote: > On 31.05.2012 19:24, Fabio Estevam wrote: >> >> Add splaschscreen support. > > > Here and in the subject a typo? splaschscreen -> splashscreen? Thanks, I will fix this and rework this patch according to your I2C suggestion. Regards, Fabio Estevam
On 02.06.2012 20:22, Fabio Estevam wrote: > Hi Dirk, > > On Sat, Jun 2, 2012 at 3:46 AM, Dirk Behme<dirk.behme@googlemail.com> wrote: >> On 31.05.2012 19:24, Fabio Estevam wrote: >>> >>> Add splaschscreen support. >> >> >> Here and in the subject a typo? splaschscreen -> splashscreen? > > Thanks, I will fix this and rework this patch according to your I2C suggestion. Maybe you could check [1] -#define CONFIG_SYS_I2C_SLAVE 0xfe +#define CONFIG_SYS_I2C_SLAVE 0x1f then? I'm no I2C expert and I wasn't sure what to use for CONFIG_SYS_I2C_SLAVE. Best regards Dirk [1] https://github.com/dirkbehme/u-boot-imx6/commit/451422a40532a9d4f86c50c57190a91f954fb795#L1L68
Hi Dirk, On Sat, Jun 2, 2012 at 3:52 PM, Dirk Behme <dirk.behme@googlemail.com> wrote: > Maybe you could check [1] > > -#define CONFIG_SYS_I2C_SLAVE 0xfe > +#define CONFIG_SYS_I2C_SLAVE 0x1f > > then? I'm no I2C expert and I wasn't sure what to use for > CONFIG_SYS_I2C_SLAVE. Yes, 0x1f is the correct address for the Hannstar LVDS I2C slave address. I was doing: i2c_read(0x1f, 3, 1, &value, 1); ,which was actually using the 0x1f value and discarded the CONFIG_SYS_I2C_SLAVE definition. I can use CONFIG_SYS_I2C_SLAVE instead, which makes the code cleaner. Thanks, Fabio Estevam
On 6/2/2012 3:36 PM, Fabio Estevam wrote: > Hi Dirk, > > On Sat, Jun 2, 2012 at 3:52 PM, Dirk Behme<dirk.behme@googlemail.com> wrote: > >> Maybe you could check [1] >> >> -#define CONFIG_SYS_I2C_SLAVE 0xfe >> +#define CONFIG_SYS_I2C_SLAVE 0x1f >> >> then? I'm no I2C expert and I wasn't sure what to use for >> CONFIG_SYS_I2C_SLAVE. > Yes, 0x1f is the correct address for the Hannstar LVDS I2C slave address. If 0x1f is the Hannstar LVDS address, then you definitely should NOT use 0x1f for the CONFIG_SYS_I2C_SLAVE value. CONFIG_SYS_I2C_SLAVE is meant to define which address the processor will respond to in a multi-master bus environment. However, as mxc_i2c does not support slave mode the entire discussion is moot. Troy
On Sat, Jun 2, 2012 at 9:12 PM, Troy Kisky <troy.kisky@boundarydevices.com> wrote: > If 0x1f is the Hannstar LVDS address, then you definitely should NOT use > 0x1f for the > > CONFIG_SYS_I2C_SLAVE value. > > > CONFIG_SYS_I2C_SLAVE is meant to define which address the processor will > respond to > in a multi-master bus environment. However, as mxc_i2c does not support > slave mode > the entire discussion is moot. Thanks for the clarification, Troy. So it means I can safely drop the CONFIG_SYS_I2C_SLAVE definition in the board config file. According to include/i2c.h: "/* * Many boards/controllers/drivers don't support an I2C slave interface so * provide a default slave address for them for use in common code. A real * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does * support a slave interface. */ #ifndef CONFIG_SYS_I2C_SLAVE #define CONFIG_SYS_I2C_SLAVE 0xfe #endif " Will submit a patch removing CONFIG_SYS_I2C_SLAVE from imx boards. Thanks, Fabio Estevam
Hi Fabio, On 31.05.2012 19:24, Fabio Estevam wrote: > Add splaschscreen support. > > It was used a Hannstar 1024 x 768 LVDS panel that can be connected to the mx6qsabrelite board. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > I understand this patch will need to be improved, but I am posting it now, so that others > can possibly test it. Just fyi: On the ALKML there are IPU patches from Sascha Hauer for the kernel. Applying Sascha's patches to the kernel and this patch to U-Boot makes the kernel crash with a NULL pointer [1]. I haven't looked into the details, wild guessing is that the U-Boot patch enables some interrupts the IPU driver isn't ready to handle before he's done his own initialization. Note that this is only fyi. Best regards Dirk [1] ... imx-ipuv3 2800000.ipu: DI1 base: 0x02a48000 remapped to c08ee000 Unable to handle kernel NULL pointer dereference at virtual address 0000000c pgd = 80004000 [0000000c] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 0 Not tainted PC is at imx_drm_handle_vblank+0xc/0x20 LR is at ipu_irq_handler+0x1c/0xdc ...
Series includes one patch to fix a register name in imx6/crm_regs.h
and a second that's a re-base of Fabio's patch from 5/31.
http://patchwork.ozlabs.org/patch/162206/
Note that I'm not sure whether this should have been based on
u-boot-video because it's video-related or u-boot imx because
the bulk of the patch set is board-specific.
arch/arm/include/asm/arch-mx6/crm_regs.h | 6 ++-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++
include/configs/mx6qsabrelite.h | 14 ++++-
3 files changed, 108 insertions(+), 2 deletions(-)
Hi Eric, On Mon, 17 Sep 2012 13:20:49 -0700 Eric Nelson <eric.nelson@boundarydevices.com> wrote: > Series includes one patch to fix a register name in imx6/crm_regs.h > and a second that's a re-base of Fabio's patch from 5/31. > http://patchwork.ozlabs.org/patch/162206/ > > Note that I'm not sure whether this should have been based on > u-boot-video because it's video-related or u-boot imx because > the bulk of the patch set is board-specific. It should be based on u-boot-imx since it touches board files. Thanks, Anatolij
Series includes one patch to fix a register name in imx6/crm_regs.h
and a second that's a re-base of Fabio's patch from 5/31.
http://patchwork.ozlabs.org/patch/162206/
arch/arm/include/asm/arch-mx6/crm_regs.h | 6 ++-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++
include/configs/mx6qsabrelite.h | 14 ++++-
3 files changed, 108 insertions(+), 2 deletions(-)
V2 rebased against u-boot-imx/master.
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 29cbfed..6aff947 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -33,6 +33,9 @@ #include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ @@ -55,6 +58,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -143,6 +151,25 @@ static iomux_v3_cfg_t button_pads[] = { MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), }; +iomux_v3_cfg_t lcd_gpio[] = { + MX6Q_PAD_SD1_CMD__GPIO_1_18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t i2c3_pads[] = { + MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), +}; + +static void setup_iomux_i2c3(void) +{ +#define CLKCTL_CCGR2 0x70 + imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); + /* Enable i2c clock */ + int reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2); + reg |= 0xC00; + writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2); +} + static void setup_iomux_enet(void) { gpio_direction_output(87, 0); /* GPIO 3-23 */ @@ -320,10 +347,85 @@ int setup_sata(void) } #endif +static struct fb_videomode lvds_xga = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +}; + +void lcd_iomux(void) +{ + int reg; + /* Turn on GPIO backlight */ + imx_iomux_v3_setup_multiple_pads(lcd_gpio, ARRAY_SIZE(lcd_gpio)); + gpio_direction_output(18, 1); + +#define CLKCTL_CGR3 0x38 +#define CLKCTL_CS2CDR 0x2C +#define CLKCTL_CSCMR2 0x20 +#define CLKCTL_CHSCCDR 0x34 +#define CLKCTL_CCGR3 0x74 + /* Turn on IPU clock */ + reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR3); + reg |= 0x300F; + writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR3); + + reg = readl(ANATOP_BASE_ADDR + 0xF0); + reg &= ~0x00003F00; + reg |= 0x00001300; + writel(reg, ANATOP_BASE_ADDR + 0xF4); + + reg = readl(CCM_BASE_ADDR + CLKCTL_CS2CDR); + reg &= ~0x00007E00; + reg |= 0x00003600; + writel(reg, CCM_BASE_ADDR + CLKCTL_CS2CDR); + + reg = readl(CCM_BASE_ADDR + CLKCTL_CSCMR2); + reg |= 0x00000C00; + writel(reg, CCM_BASE_ADDR + CLKCTL_CSCMR2); + + reg = 0x0002A953; + writel(reg, CCM_BASE_ADDR + CLKCTL_CHSCCDR); + + writel(0x201, IOMUXC_BASE_ADDR + 0x8); +} + +void lcd_enable(void) +{ + + int ret = ipuv3_fb_init(&lvds_xga, 0, IPU_PIX_FMT_RGB666); + if (ret) + printf("LCD cannot be configured: %d\n", ret); +} + +void setup_lvds_poweron(void) +{ + uchar value; + + i2c_read(0x1f, 3, 1, &value, 1); + value &= ~0x2; + i2c_write(0x1f, 3, 1, &value, 1); + i2c_read(0x1f, 1, 1, &value, 1); + value |= 0x2; + i2c_write(0x1f, 1, 1, &value, 1); +} + int board_early_init_f(void) { setup_iomux_uart(); setup_buttons(); + lcd_iomux(); + setup_iomux_i2c3(); return 0; } @@ -341,9 +443,19 @@ int board_init(void) setup_sata(); #endif +#ifdef CONFIG_VIDEO + lcd_enable(); +#endif return 0; } +int board_late_init(void) +{ + setup_lvds_poweron(); + setenv("stdout", "serial"); + return 0; +} + int checkboard(void) { puts("Board: MX6Q-Sabre Lite\n"); diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index feabc05..79b7db7 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -38,10 +38,11 @@ #define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO @@ -111,6 +112,24 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 + +/* I2C Configs */ +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_MX6Q_PORT3 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x1f + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1
Add splaschscreen support. It was used a Hannstar 1024 x 768 LVDS panel that can be connected to the mx6qsabrelite board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- I understand this patch will need to be improved, but I am posting it now, so that others can possibly test it. board/freescale/mx6qsabrelite/mx6qsabrelite.c | 112 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 21 +++++- 2 files changed, 132 insertions(+), 1 deletions(-)