Patchwork [2/5] ARM: imx6q: add clock for apbh-dma

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Submitter Huang Shijie
Date May 24, 2012, 10:50 a.m.
Message ID <1337856659-24812-2-git-send-email-b32955@freescale.com>
Download mbox | patch
Permalink /patch/161118/
State New
Headers show

Comments

Huang Shijie - May 24, 2012, 10:50 a.m.
add the clock for apbh-dma.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 arch/arm/mach-imx/clk-imx6q.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)
Sascha Hauer - May 24, 2012, 5:30 p.m.
On Thu, May 24, 2012 at 06:50:56PM +0800, Huang Shijie wrote:
> add the clock for apbh-dma.
> 
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
>  arch/arm/mach-imx/clk-imx6q.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index cab02d0..12d9040 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
>  	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
>  
>  	/*                                name             parent_name          reg         shift */
> -	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
> +	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);

This change looks strange. Is this correct?

Sascha
Huang Shijie - May 25, 2012, 2:07 a.m.
于 2012年05月25日 01:30, Sascha Hauer 写道:
> On Thu, May 24, 2012 at 06:50:56PM +0800, Huang Shijie wrote:
>> add the clock for apbh-dma.
>>
>> Signed-off-by: Huang Shijie<b32955@freescale.com>
>> ---
>>   arch/arm/mach-imx/clk-imx6q.c |    3 ++-
>>   1 files changed, 2 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> index cab02d0..12d9040 100644
>> --- a/arch/arm/mach-imx/clk-imx6q.c
>> +++ b/arch/arm/mach-imx/clk-imx6q.c
>> @@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
>>   	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
>>
>>   	/*                                name             parent_name          reg         shift */
>> -	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
>> +	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
> This change looks strange. Is this correct?
yes. it's correct.

The datasheet about the clock tells us the parent of the apbh-dma is usdhc3.

Best Regards
Huang Shijie

> Sascha
>
>
Shawn Guo - May 25, 2012, 2:41 a.m.
On Fri, May 25, 2012 at 10:07:41AM +0800, Huang Shijie wrote:
> 于 2012年05月25日 01:30, Sascha Hauer 写道:
> >On Thu, May 24, 2012 at 06:50:56PM +0800, Huang Shijie wrote:
> >>add the clock for apbh-dma.
> >>
> >>Signed-off-by: Huang Shijie<b32955@freescale.com>
> >>---
> >>  arch/arm/mach-imx/clk-imx6q.c |    3 ++-
> >>  1 files changed, 2 insertions(+), 1 deletions(-)
> >>
> >>diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> >>index cab02d0..12d9040 100644
> >>--- a/arch/arm/mach-imx/clk-imx6q.c
> >>+++ b/arch/arm/mach-imx/clk-imx6q.c
> >>@@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
> >>  	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
> >>
> >>  	/*                                name             parent_name          reg         shift */
> >>-	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
> >>+	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
> >This change looks strange. Is this correct?
> yes. it's correct.
> 
> The datasheet about the clock tells us the parent of the apbh-dma is usdhc3.
> 
I guess it's a hardware bug.
Sascha Hauer - May 25, 2012, 6:47 a.m.
On Fri, May 25, 2012 at 10:07:41AM +0800, Huang Shijie wrote:
> 于 2012年05月25日 01:30, Sascha Hauer 写道:
> >On Thu, May 24, 2012 at 06:50:56PM +0800, Huang Shijie wrote:
> >>add the clock for apbh-dma.
> >>
> >>Signed-off-by: Huang Shijie<b32955@freescale.com>
> >>---
> >>  arch/arm/mach-imx/clk-imx6q.c |    3 ++-
> >>  1 files changed, 2 insertions(+), 1 deletions(-)
> >>
> >>diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> >>index cab02d0..12d9040 100644
> >>--- a/arch/arm/mach-imx/clk-imx6q.c
> >>+++ b/arch/arm/mach-imx/clk-imx6q.c
> >>@@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
> >>  	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
> >>
> >>  	/*                                name             parent_name          reg         shift */
> >>-	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
> >>+	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
> >This change looks strange. Is this correct?
> yes. it's correct.
> 
> The datasheet about the clock tells us the parent of the apbh-dma is usdhc3.

Ok then, just wanted to make sure this is no patching accident.

Sascha

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index cab02d0..12d9040 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -318,7 +318,7 @@  int __init mx6q_clocks_init(void)
 	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
 
 	/*                                name             parent_name          reg         shift */
-	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
+	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
 	clk[asrc]         = imx_clk_gate2("asrc",          "asrc_podf",         base + 0x68, 6);
 	clk[can1_ipg]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
 	clk[can1_serial]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);
@@ -393,6 +393,7 @@  int __init mx6q_clocks_init(void)
 	clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
 	clk_register_clkdev(clk[twd], NULL, "smp_twd");
 	clk_register_clkdev(clk[usboh3], NULL, "usboh3");
+	clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh");
 	clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
 	clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
 	clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");