From patchwork Wed May 23 17:18:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 160973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id AFC18B6FB9 for ; Thu, 24 May 2012 03:19:04 +1000 (EST) Received: from localhost ([::1]:51060 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXFDC-0006U9-Ff for incoming@patchwork.ozlabs.org; Wed, 23 May 2012 13:19:02 -0400 Received: from eggs.gnu.org ([208.118.235.92]:60423) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXFD4-0006SH-8u for qemu-devel@nongnu.org; Wed, 23 May 2012 13:18:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SXFD2-0002jt-21 for qemu-devel@nongnu.org; Wed, 23 May 2012 13:18:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42010) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXFD1-0002je-PQ for qemu-devel@nongnu.org; Wed, 23 May 2012 13:18:51 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q4NHIlam014447 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 23 May 2012 13:18:47 -0400 Received: from yakj.usersys.redhat.com (ovpn-112-20.ams2.redhat.com [10.36.112.20]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q4NHIiXe021242; Wed, 23 May 2012 13:18:44 -0400 Message-ID: <4FBD1BF3.5000901@redhat.com> Date: Wed, 23 May 2012 19:18:43 +0200 From: Paolo Bonzini User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:12.0) Gecko/20120430 Thunderbird/12.0.1 MIME-Version: 1.0 To: =?ISO-8859-15?Q?Andreas_F=E4rber?= References: <1335958273-769-1-git-send-email-pbonzini@redhat.com> <1335958273-769-7-git-send-email-pbonzini@redhat.com> <4FBD190B.60800@suse.de> In-Reply-To: <4FBD190B.60800@suse.de> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Blue Swirl , peter.maydell@linaro.org, aliguori@us.ibm.com, qemu-devel@nongnu.org, liwp@linux.vnet.ibm.com Subject: Re: [Qemu-devel] [PATCH 06/21] qdev: push "type" property up to Object X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Il 23/05/2012 19:06, Andreas Färber ha scritto: > Am 02.05.2012 13:30, schrieb Paolo Bonzini: >> Now that Object is a type, add an instance_init function and push >> the "type" property from qdev to there. >> >> Signed-off-by: Paolo Bonzini > > The rebased version from qdev-props-4 breaks and hangs `make check`: > > GTESTER check-qtest-sparc > qemu-system-sparc: Insufficient permission to perform this operation > > Paolo, can you please investigate? Please try this patch (untested; please add my signed-off-by if you end up committing it). There is also a "type" property in arm_l2x0.c, but it seems unused. Paolo diff --git a/hw/m48t59.c b/hw/m48t59.c index 24dcbfa..3cc2178 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -65,7 +65,7 @@ struct M48t59State { /* NVRAM storage */ uint8_t *buffer; /* Model parameters */ - uint32_t type; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ + uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ /* NVRAM storage */ uint16_t addr; uint8_t lock; @@ -197,9 +197,9 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val) NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val); /* check for NVRAM access */ - if ((NVRAM->type == 2 && addr < 0x7f8) || - (NVRAM->type == 8 && addr < 0x1ff8) || - (NVRAM->type == 59 && addr < 0x1ff0)) + if ((NVRAM->model == 2 && addr < 0x7f8) || + (NVRAM->model == 8 && addr < 0x1ff8) || + (NVRAM->model == 59 && addr < 0x1ff0)) goto do_write; /* TOD access */ @@ -334,7 +334,7 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val) tmp = from_bcd(val); if (tmp >= 0 && tmp <= 99) { get_time(NVRAM, &tm); - if (NVRAM->type == 8) + if (NVRAM->model == 8) tm.tm_year = from_bcd(val) + 68; // Base year is 1968 else tm.tm_year = from_bcd(val); @@ -362,9 +362,9 @@ uint32_t m48t59_read (void *opaque, uint32_t addr) uint32_t retval = 0xFF; /* check for NVRAM access */ - if ((NVRAM->type == 2 && addr < 0x078f) || - (NVRAM->type == 8 && addr < 0x1ff8) || - (NVRAM->type == 59 && addr < 0x1ff0)) + if ((NVRAM->model == 2 && addr < 0x078f) || + (NVRAM->model == 8 && addr < 0x1ff8) || + (NVRAM->model == 59 && addr < 0x1ff0)) goto do_read; /* TOD access */ @@ -439,7 +439,7 @@ uint32_t m48t59_read (void *opaque, uint32_t addr) case 0x07FF: /* year */ get_time(NVRAM, &tm); - if (NVRAM->type == 8) + if (NVRAM->model == 8) retval = to_bcd(tm.tm_year - 68); // Base year is 1968 else retval = to_bcd(tm.tm_year); @@ -633,7 +633,7 @@ static const MemoryRegionOps m48t59_io_ops = { /* Initialisation routine */ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, - uint32_t io_base, uint16_t size, int type) + uint32_t io_base, uint16_t size, int model) { DeviceState *dev; SysBusDevice *s; @@ -641,7 +641,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, M48t59State *state; dev = qdev_create(NULL, "m48t59"); - qdev_prop_set_uint32(dev, "type", type); + qdev_prop_set_uint32(dev, "model", model); qdev_prop_set_uint32(dev, "size", size); qdev_prop_set_uint32(dev, "io_base", io_base); qdev_init_nofail(dev); @@ -661,14 +661,14 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, } M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, - int type) + int model) { M48t59ISAState *d; ISADevice *dev; M48t59State *s; dev = isa_create(bus, "m48t59_isa"); - qdev_prop_set_uint32(&dev->qdev, "type", type); + qdev_prop_set_uint32(&dev->qdev, "model", model); qdev_prop_set_uint32(&dev->qdev, "size", size); qdev_prop_set_uint32(&dev->qdev, "io_base", io_base); qdev_init_nofail(&dev->qdev); @@ -686,7 +686,7 @@ M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, static void m48t59_init_common(M48t59State *s) { s->buffer = g_malloc0(s->size); - if (s->type == 59) { + if (s->model == 59) { s->alrm_timer = qemu_new_timer_ns(rtc_clock, &alarm_cb, s); s->wd_timer = qemu_new_timer_ns(vm_clock, &watchdog_cb, s); } @@ -722,7 +722,7 @@ static int m48t59_init1(SysBusDevice *dev) static Property m48t59_isa_properties[] = { DEFINE_PROP_UINT32("size", M48t59ISAState, state.size, -1), - DEFINE_PROP_UINT32("type", M48t59ISAState, state.type, -1), + DEFINE_PROP_UINT32("model", M48t59ISAState, state.model, -1), DEFINE_PROP_HEX32( "io_base", M48t59ISAState, state.io_base, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -746,7 +746,7 @@ static TypeInfo m48t59_isa_info = { static Property m48t59_properties[] = { DEFINE_PROP_UINT32("size", M48t59SysBusState, state.size, -1), - DEFINE_PROP_UINT32("type", M48t59SysBusState, state.type, -1), + DEFINE_PROP_UINT32("model", M48t59SysBusState, state.model, -1), DEFINE_PROP_HEX32( "io_base", M48t59SysBusState, state.io_base, 0), DEFINE_PROP_END_OF_LIST(), };