From patchwork Wed May 23 06:34:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 160873 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id BF4C7B7017 for ; Wed, 23 May 2012 16:35:55 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754581Ab2EWGfp (ORCPT ); Wed, 23 May 2012 02:35:45 -0400 Received: from rcsinet15.oracle.com ([148.87.113.117]:32564 "EHLO rcsinet15.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965176Ab2EWGfC (ORCPT ); Wed, 23 May 2012 02:35:02 -0400 Received: from ucsinet22.oracle.com (ucsinet22.oracle.com [156.151.31.94]) by rcsinet15.oracle.com (Sentrion-MTA-4.2.2/Sentrion-MTA-4.2.2) with ESMTP id q4N6Yw2l013361 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 23 May 2012 06:34:59 GMT Received: from acsmt357.oracle.com (acsmt357.oracle.com [141.146.40.157]) by ucsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id q4N6YvYp009433 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 23 May 2012 06:34:58 GMT Received: from abhmt103.oracle.com (abhmt103.oracle.com [141.146.116.55]) by acsmt357.oracle.com (8.12.11.20060308/8.12.11) with ESMTP id q4N6YvGP018690; Wed, 23 May 2012 01:34:57 -0500 Received: from linux-siqj.site (/75.36.246.248) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 22 May 2012 23:34:57 -0700 From: Yinghai Lu To: Bjorn Helgaas Cc: Andrew Morton , Linus Torvalds , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH 11/11] PCI: Treat ROM resource as optional during assigning. Date: Tue, 22 May 2012 23:34:37 -0700 Message-Id: <1337754877-19759-12-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1337754877-19759-1-git-send-email-yinghai@kernel.org> References: <1337754877-19759-1-git-send-email-yinghai@kernel.org> X-Source-IP: ucsinet22.oracle.com [156.151.31.94] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org So will try to allocate them together with requested ones, if can not assign them, could go with requested one only, and just skip ROM resource. Signed-off-by: Yinghai Lu --- drivers/pci/setup-bus.c | 21 +++++++-------------- include/linux/pci.h | 5 +++++ 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index ed32864..41c08d6 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -305,18 +305,10 @@ static void assign_requested_resources_sorted(struct list_head *head, idx = res - &dev_res->dev->resource[0]; if (resource_size(res) && pci_assign_resource_fit(dev_res->dev, idx, fit)) { - if (fail_head) { - /* - * if the failed res is for ROM BAR, and it will - * be enabled later, don't add it to the list - */ - if (!((idx == PCI_ROM_RESOURCE) && - (!(res->flags & IORESOURCE_ROM_ENABLE)))) - add_to_list(fail_head, - dev_res->dev, res, - 0 /* dont care */, - 0 /* dont care */); - } + if (fail_head) + add_to_list(fail_head, dev_res->dev, res, + 0 /* dont care */, + 0 /* dont care */); reset_resource(res); } } @@ -833,8 +825,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, continue; r_size = resource_size(r); - /* put SRIOV requested res to the optional list */ - if (realloc_head && is_pci_iov_resource_idx(i)) { + /* put SRIOV/ROM requested res to the optional list */ + if (realloc_head && (is_pci_iov_resource_idx(i) || + is_pci_rom_resource_idx(i))) { r->end = r->start - 1; add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */); children_add_size += r_size; diff --git a/include/linux/pci.h b/include/linux/pci.h index 0d254d9..08c081c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -122,6 +122,11 @@ static inline bool is_pci_iov_resource_idx(int i) return false; } +static inline bool is_pci_rom_resource_idx(int i) +{ + return i == PCI_ROM_RESOURCE; +} + typedef int __bitwise pci_power_t; #define PCI_D0 ((pci_power_t __force) 0)