| Submitter | Andreas Färber |
|---|---|
| Date | May 23, 2012, 3:07 a.m. |
| Message ID | <1337742502-28565-7-git-send-email-afaerber@suse.de> |
| Download | mbox | patch |
| Permalink | /patch/160832/ |
| State | New |
| Headers | show |
Comments
On 05/23/2012 05:07 AM, Andreas Färber wrote: > Also change return type to bool. > > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > hw/apic.h | 2 +- > hw/apic_common.c | 2 +- > hw/pc.c | 6 +++--- > target-i386/helper.c | 2 +- > target-i386/kvm.c | 4 +++- > 5 files changed, 9 insertions(+), 7 deletions(-) > > diff --git a/hw/apic.h b/hw/apic.h > index 62179ce..1030097 100644 > --- a/hw/apic.h > +++ b/hw/apic.h > @@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, > TPRAccess access); > > /* pc.c */ > -int cpu_is_bsp(CPUX86State *env); > +bool cpu_is_bsp(X86CPU *cpu); > DeviceState *cpu_get_current_apic(void); > > #endif > diff --git a/hw/apic_common.c b/hw/apic_common.c > index 46a9ff7..bea885b 100644 > --- a/hw/apic_common.c > +++ b/hw/apic_common.c > @@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d) > APICCommonClass *info = APIC_COMMON_GET_CLASS(s); > bool bsp; > > - bsp = cpu_is_bsp(&s->cpu->env); > + bsp = cpu_is_bsp(s->cpu); > s->apicbase = 0xfee00000 | > (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; > > diff --git a/hw/pc.c b/hw/pc.c > index 6bb3d2a..f0cbfef 100644 > --- a/hw/pc.c > +++ b/hw/pc.c > @@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd) > nb_ne2k++; > } > > -int cpu_is_bsp(CPUX86State *env) > +bool cpu_is_bsp(X86CPU *cpu) > { > /* We hard-wire the BSP to the first CPU. */ > - return env->cpu_index == 0; > + return cpu->env.cpu_index == 0; > } > > DeviceState *cpu_get_current_apic(void) > @@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque) > CPUX86State *env = &cpu->env; > > cpu_reset(CPU(cpu)); > - env->halted = !cpu_is_bsp(env); > + env->halted = !cpu_is_bsp(cpu); > } > > static X86CPU *pc_new_cpu(const char *cpu_model) > diff --git a/target-i386/helper.c b/target-i386/helper.c > index 2cc8097..018a98f 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu) > env->interrupt_request = sipi; > env->pat = pat; > apic_init_reset(env->apic_state); > - env->halted = !cpu_is_bsp(env); > + env->halted = !cpu_is_bsp(cpu); > } > > void do_cpu_sipi(X86CPU *cpu) > diff --git a/target-i386/kvm.c b/target-i386/kvm.c > index 0d0d8f6..97a2cb1 100644 > --- a/target-i386/kvm.c > +++ b/target-i386/kvm.c > @@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env) > > void kvm_arch_reset_vcpu(CPUX86State *env) > { > + X86CPU *cpu = x86_env_get_cpu(env); > + > env->exception_injected = -1; > env->interrupt_injected = -1; > env->xcr0 = 1; > if (kvm_irqchip_in_kernel()) { > - env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE : > + env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE : > KVM_MP_STATE_UNINITIALIZED; > } else { > env->mp_state = KVM_MP_STATE_RUNNABLE; > This patch won't be necessary with http://comments.gmane.org/gmane.comp.emulators.qemu/159553 where cpu_is_bsp() is abolished.
Patch
diff --git a/hw/apic.h b/hw/apic.h index 62179ce..1030097 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, TPRAccess access); /* pc.c */ -int cpu_is_bsp(CPUX86State *env); +bool cpu_is_bsp(X86CPU *cpu); DeviceState *cpu_get_current_apic(void); #endif diff --git a/hw/apic_common.c b/hw/apic_common.c index 46a9ff7..bea885b 100644 --- a/hw/apic_common.c +++ b/hw/apic_common.c @@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d) APICCommonClass *info = APIC_COMMON_GET_CLASS(s); bool bsp; - bsp = cpu_is_bsp(&s->cpu->env); + bsp = cpu_is_bsp(s->cpu); s->apicbase = 0xfee00000 | (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; diff --git a/hw/pc.c b/hw/pc.c index 6bb3d2a..f0cbfef 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd) nb_ne2k++; } -int cpu_is_bsp(CPUX86State *env) +bool cpu_is_bsp(X86CPU *cpu) { /* We hard-wire the BSP to the first CPU. */ - return env->cpu_index == 0; + return cpu->env.cpu_index == 0; } DeviceState *cpu_get_current_apic(void) @@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque) CPUX86State *env = &cpu->env; cpu_reset(CPU(cpu)); - env->halted = !cpu_is_bsp(env); + env->halted = !cpu_is_bsp(cpu); } static X86CPU *pc_new_cpu(const char *cpu_model) diff --git a/target-i386/helper.c b/target-i386/helper.c index 2cc8097..018a98f 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu) env->interrupt_request = sipi; env->pat = pat; apic_init_reset(env->apic_state); - env->halted = !cpu_is_bsp(env); + env->halted = !cpu_is_bsp(cpu); } void do_cpu_sipi(X86CPU *cpu) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 0d0d8f6..97a2cb1 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env) void kvm_arch_reset_vcpu(CPUX86State *env) { + X86CPU *cpu = x86_env_get_cpu(env); + env->exception_injected = -1; env->interrupt_injected = -1; env->xcr0 = 1; if (kvm_irqchip_in_kernel()) { - env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE : + env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE : KVM_MP_STATE_UNINITIALIZED; } else { env->mp_state = KVM_MP_STATE_RUNNABLE;
Also change return type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de> --- hw/apic.h | 2 +- hw/apic_common.c | 2 +- hw/pc.c | 6 +++--- target-i386/helper.c | 2 +- target-i386/kvm.c | 4 +++- 5 files changed, 9 insertions(+), 7 deletions(-)